ARMv6-M

Concept

ARMv6-M is an ARM instruction set architecture profile supported as a target by the ExactStep instruction set simulator. ExactStep advertises ARMv6-M (referred to as 'ARM-v6m' in its README) alongside RISC-V (RV32IMAC, RV64IMAC) and MIPS (mips-i) as one of its emulated CPU architectures, and exposes it via the simulator's --march/-m option (e.g. with the value 'armv6').

First seen 7/10/2026

Last seen 7/10/2026

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ARMv6-M

Overview

ARMv6-M is an ARM architecture profile targeted by embedded microcontrollers. Within the ExactStep project, ARMv6-M is one of the multi-target instruction set architectures that the simulator can emulate, alongside RISC-V (RV32IMAC, RV64IMAC) and MIPS (mips-i).

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ExactStep ← implements 100% 1e

ExactStep implements the ARM-v6m CPU model.

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CITATIONS

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[1] ExactStep supports ARMv6-M as one of its emulated CPU architectures alongside RISC-V (RV32IMAC, RV64IMAC) and MIPS (mips-i). ultraembedded/exactstep

[2] ARMv6-M is selected in ExactStep via the --march / -m MISA command line option, with 'armv6' given as an example machine variant. ultraembedded/exactstep

[3] ExactStep executes one instruction per call to cpu::step() and is designed for ease of extension as a library for cosimulation, peripheral development, and System-C bus interfacing, rather than raw execution performance. ultraembedded/exactstep