An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates
PaperFirst seen 6/11/2026
Last seen 6/11/2026
Evidence 12 chunks
NEIGHBORHOOD
No graph connections found for this entity yet. It may appear in future ingestion runs.
explore full graph →RELATIONSHIPS
49 connectionsThe paper includes structural hazards as a type of pipeline hazard to test.
The paper aims to systematize control logic verification using formal specifications.
The paper includes control hazards as a type of pipeline hazard to test.
The paper handles exceptions in pipeline as one of the four main hazard types.
The paper compares its approach with random test generation, noting that random generation is inefficient.
The paper uses instruction dependencies as part of test generation.
The paper mentions model checking based test generation as a related technique.
The paper discusses pipeline interlocks as the typical error target for hazard testing.
The paper mentions EXPRESSION ADL as the specification language used by related work.
The paper mentions the SMV model checker as used by related work.
The approach was applied to verification of the floating point coprocessor CP1.
The approach was applied to verification of the complex arithmetic coprocessor CP2.
The paper is based on pipeline hazards as the main testing targets.
The paper introduces composite test actions as test actions composed from multiple basic templates.
Specification-Driven Directed Test Generation for Validation of Pipelined Processors mentions → 95% 2e
The paper references the Mishra-Dutt paper on specification-driven directed test generation.
The paper introduces iterators over template parameters to enumerate test cases.
The paper uses overlapping composition to combine templates for composite test actions.
The paper includes data hazards as a type of pipeline hazard to test.
The paper uses concatenation composition to combine templates for composite test actions.
The paper uses the floating point unit FPU as a case study for structural hazard testing.
Related work uses fault models; the paper discusses this in context of related approaches.
The paper's approach is based on combinatorial model-based generation.
The paper mentions TLB entries in the context of address dependencies.
The paper mentions template-based test generation as a related technique.
The paper mentions Operation State Machine as used in a related approach.
The paper mentions Genesys-Pro as a related tool for template-based test generation.
The paper mentions constraint solving as used by Genesys-Pro in related work.
The paper mentions FSM traversal based test generation as a related technique.
The paper references Ur and Yadin's paper on micro-architecture coverage directed test generation.
The paper references Kamkin's earlier work on test program generation for microprocessors.
The paper is authored by Alexander Kamkin.
The paper references Vorobyev and Kamkin's work on test generation for memory management units.
The paper is co-authored by Dmitry Vorobyev.
The paper is published by ISP RAS.
The paper introduces the concept of pipeline hazards templates as basis for test program generation.
The approach uses formal specification of microprocessor ISA.
The paper describes an approach to automated test program generation.
The paper uses MIPS ISA to illustrate ideas of the approach.
The paper compares the approach with cycle-accurate model based techniques.
The paper uses test actions as core structural elements of test programs.
The paper uses test situations to specify what must be tested.
The paper uses test oracles to check microprocessor state after test action execution.
Instructions are grouped into equivalence classes used in templates.
The paper uses register dependencies as a type of instruction dependency.
The paper uses address dependencies as a type of instruction dependency related to memory management.
The paper mentions branch prediction as a control logic mechanism verified by the approach.
The paper mentions speculative execution as a mechanism verified by the approach.
The paper introduces simple test actions as test actions corresponding to a single basic template.
The paper uses shift composition to combine templates for composite test actions.