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An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates

Paper
First seen 6/11/2026
Last seen 6/11/2026
Evidence 12 chunks

NEIGHBORHOOD

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RELATIONSHIPS

49 connections
structural hazards uses → 95% 2e
The paper includes structural hazards as a type of pipeline hazard to test.
control logic verification uses → 95% 2e
The paper aims to systematize control logic verification using formal specifications.
control hazards uses → 95% 2e
The paper includes control hazards as a type of pipeline hazard to test.
exceptions in pipeline uses → 95% 2e
The paper handles exceptions in pipeline as one of the four main hazard types.
random test generation ← compares with 90% 2e
The paper compares its approach with random test generation, noting that random generation is inefficient.
instruction dependencies uses → 95% 2e
The paper uses instruction dependencies as part of test generation.
model checking based test generation mentions → 95% 2e
The paper mentions model checking based test generation as a related technique.
pipeline interlocks uses → 90% 2e
The paper discusses pipeline interlocks as the typical error target for hazard testing.
EXPRESSION ADL mentions → 95% 2e
The paper mentions EXPRESSION ADL as the specification language used by related work.
SMV model checker mentions → 95% 2e
The paper mentions the SMV model checker as used by related work.
floating point coprocessor CP1 evaluates → 95% 2e
The approach was applied to verification of the floating point coprocessor CP1.
complex arithmetic coprocessor CP2 evaluates → 95% 2e
The approach was applied to verification of the complex arithmetic coprocessor CP2.
Pipeline Hazards uses → 100% 2e
The paper is based on pipeline hazards as the main testing targets.
composite test actions introduces → 95% 2e
The paper introduces composite test actions as test actions composed from multiple basic templates.
The paper references the Mishra-Dutt paper on specification-driven directed test generation.
template parameter iterators introduces → 90% 2e
The paper introduces iterators over template parameters to enumerate test cases.
overlapping template composition uses → 95% 2e
The paper uses overlapping composition to combine templates for composite test actions.
data hazards uses → 95% 2e
The paper includes data hazards as a type of pipeline hazard to test.
concatenation template composition uses → 95% 1e
The paper uses concatenation composition to combine templates for composite test actions.
floating point unit FPU uses → 90% 1e
The paper uses the floating point unit FPU as a case study for structural hazard testing.
fault model uses → 75% 1e
Related work uses fault models; the paper discusses this in context of related approaches.
combinatorial model-based generation uses → 90% 1e
The paper's approach is based on combinatorial model-based generation.
TLB memory management uses → 80% 1e
The paper mentions TLB entries in the context of address dependencies.
template-based test generation mentions → 95% 1e
The paper mentions template-based test generation as a related technique.
Operation State Machine mentions → 90% 1e
The paper mentions Operation State Machine as used in a related approach.
Genesys-Pro mentions → 95% 1e
The paper mentions Genesys-Pro as a related tool for template-based test generation.
constraint solving for test generation mentions → 90% 1e
The paper mentions constraint solving as used by Genesys-Pro in related work.
FSM traversal based test generation mentions → 90% 1e
The paper mentions FSM traversal based test generation as a related technique.
The paper references Ur and Yadin's paper on micro-architecture coverage directed test generation.
Test Program Generation for Microprocessors mentions → 95% 1e
The paper references Kamkin's earlier work on test program generation for microprocessors.
Alexander Kamkin authored by → 100% 1e
The paper is authored by Alexander Kamkin.
The paper references Vorobyev and Kamkin's work on test generation for memory management units.
Dmitry Vorobyev authored by → 100% 1e
The paper is co-authored by Dmitry Vorobyev.
The paper is published by ISP RAS.
pipeline hazards templates introduces → 100% 1e
The paper introduces the concept of pipeline hazards templates as basis for test program generation.
ISA formal specification uses → 100% 1e
The approach uses formal specification of microprocessor ISA.
test program generation introduces → 100% 1e
The paper describes an approach to automated test program generation.
MIPS ISA uses → 95% 1e
The paper uses MIPS ISA to illustrate ideas of the approach.
cycle-accurate models ← compares with 90% 1e
The paper compares the approach with cycle-accurate model based techniques.
test action uses → 95% 1e
The paper uses test actions as core structural elements of test programs.
test situations uses → 95% 1e
The paper uses test situations to specify what must be tested.
test oracle uses → 90% 1e
The paper uses test oracles to check microprocessor state after test action execution.
equivalence classes of instructions uses → 90% 1e
Instructions are grouped into equivalence classes used in templates.
register dependencies uses → 95% 1e
The paper uses register dependencies as a type of instruction dependency.
address dependencies uses → 90% 1e
The paper uses address dependencies as a type of instruction dependency related to memory management.
Branch Prediction uses → 90% 1e
The paper mentions branch prediction as a control logic mechanism verified by the approach.
speculative execution uses → 90% 1e
The paper mentions speculative execution as a mechanism verified by the approach.
simple test actions introduces → 95% 1e
The paper introduces simple test actions as test actions corresponding to a single basic template.
shift template composition uses → 95% 1e
The paper uses shift composition to combine templates for composite test actions.