MINRES Technologies GmbH
OrganizationMINRES Technologies GmbH is represented in the provided evidence through MINRES-branded RISC-V RTL processor cores used in academic cross-level verification studies. The evidence includes a 32-bit pipelined RISC-V core from the MINRES The Good Core (TGC) series used as an industrial RTL device under test in a SystemC/Verilator co-simulation setup, and a pipelined industrial RISC-V TGF series core for which an efficient cross-level testing approach reportedly found several serious bugs while processing more than 200 million instructions per hour.
WIKI
Overview
MINRES Technologies GmbH is connected in the available evidence to MINRES-branded RISC-V RTL processor cores used as industrial devices under test in cross-level processor-verification research. The strongest evidence concerns a 32-bit pipelined RISC-V core of the MINRES The Good Core (TGC) series, which was used as the DUT in a Coverage-guided Aging evaluation and was described as already extensively verified with simulation-based approaches and formal techniques. [C1]
A separate cross-level testing paper reports that its approach found several serious bugs in a pipelined industrial RISC-V TGF series core and processed more than 200 million instructions per hour. [C2]
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