Golden Model
ConceptA golden model (or reference model) is a high-level software model of a processor or design used as the expected-behavior baseline during verification. In co-simulation and hardware-fuzzing flows, architectural state computed by the golden model — most commonly an ISA-level simulation result — is cross-checked against the design-under-test (DUT). The Spike and Dromajo simulators are common RISC-V instances. Golden models are widely used because randomly generated tests are not naturally self-checking, but the cost of building and maintaining them has motivated 'golden-free' verification methods in adjacent areas such as hardware-Trojan detection.
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Definition
A golden model (also called a reference model) is a high-level software model of a processor or design used as the expected-behavior baseline during verification. It is characterized as fast and uncomplicated, omitting implementation details such as pipeline depth, buffer sizes, or branch prediction, and updating architectural state at instruction-level granularity rather than cycle-by-cycle (Kabylkas et al., MICRO-54, 2021; survey on hardware fuzzing, Boston University).
In the RTL-fuzzing literature, the golden model is explicitly described as an ISA-level simulation result used for differential comparison: "DIFUZZRTL keeps comparing an execution result of an RTL design with that of a golden model (i.e., an ISA-level simulation result), thus detecting the bugs at ISA level." (Hur et al., DIFUZZRTL)