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add_directed_instr_stream

CodeArtifact WIKI v1 · 5/26/2026

add_directed_instr_stream is a function referenced in the riscv-dv riscv_asm_program_gen flow. The available evidence describes it as participating in selection of directed-instruction stream ratios during RISC-V assembly program generation, with an example log adding a riscv_jal_instr stream at a 30/1000 ratio.

Overview

add_directed_instr_stream is a code artifact referenced in the riscv_asm_program_gen.sv assembly-program generation flow used by the open-source CHIPS Alliance riscv-dv random instruction generator for RISC-V processor verification. The surrounding riscv_asm_program_gen class is described as generating complete RISC-V assembly programs, including initialization, instruction, data, stack, page-table, interrupt, and exception-handling sections. [C1]

Role in program generation

Within the described gen_program() flow, gen_program() first acts as the main function that generates all sections of the assembly program. It then calls get_directed_instr_stream(), and the ratio of directed instruction generation is selected from another function named add_directed_instr_stream(). [C2]

The evidence includes a representative reporter message from riscv_asm_program_gen.sv showing a directed stream being added:

riscv_asm_program_gen.sv(1552) @ 0: reporter [asm_gen] Adding directed instruction stream:riscv_jal_instr ratio: 30/1000

This indicates that add_directed_instr_stream is associated with registering or adding a named directed instruction stream together with a ratio value, as shown by the riscv_jal_instr example at 30/1000. [C3]

Relationship to later directed-stream generation

After header generation and GPR initialization, the described flow calls generate_directed_instr_stream(). That later function decides the ratio, inserts directed instruction streams, randomizes instructions, and selects source and destination registers such as rs1, rs2, and rd based on instruction type. [C4]

Based on the provided evidence, add_directed_instr_stream appears in the earlier directed-stream setup path, while generate_directed_instr_stream() is described as the later step that inserts and randomizes the directed streams into the generated assembly program. [C2][C4]

Evidence limitations

The provided evidence does not include the SystemVerilog implementation, function signature, arguments, return type, or full control flow of add_directed_instr_stream. The documented claims are therefore limited to its placement in the gen_program() flow and its observed association with adding directed instruction streams and ratios. [C2][C3]

LINKED ENTITIES

4 links
riscv_asm_program_gen defined_or_used_within
gen_program called_during_flow_of
get_directed_instr_stream associated_directed_stream_setup
generate_directed_instr_stream precedes_or_configures_related_generation_step

CITATIONS

4 sources
4 citations
[1] riscv_asm_program_gen generates complete RISC-V assembly programs for riscv-dv verification flows, including sections such as initialization, instruction, data, stack, page table, interrupt, and exception handling. RISC-V source class riscv_asm_program_gen, the brain behind ...
[2] In the described gen_program flow, get_directed_instr_stream is called and the ratio of instruction generation is selected from add_directed_instr_stream. RISC-V source class riscv_asm_program_gen, the brain behind ...
[3] An example reporter message shows a directed instruction stream named riscv_jal_instr being added with ratio 30/1000 from riscv_asm_program_gen.sv. RISC-V source class riscv_asm_program_gen, the brain behind ...
[4] generate_directed_instr_stream is described as deciding ratios, inserting directed instruction streams, randomizing instructions, and selecting rs1, rs2, and rd based on instruction type. RISC-V source class riscv_asm_program_gen, the brain behind ...