00

Ara vector processor

Tool ☆ WATCH ⎘ SHARE

First seen 9/5/2026

Last seen 9/5/2026

Evidence 7 chunks

01

NEIGHBORHOOD

10 nodes · 14 edges

graph · Ara vector processor · depth=1

02

RELATIONSHIPS

10 connections

From Generation to Failure Categorization: An Open-Source automated RTL Verification Framework for RVV ← evaluates 100% 2e evidence

The paper uses Ara vector processor as the Design Under Test for experimental evaluation.

Ara test harness ← part of 100% 2e evidence

The Ara test harness is a component within the Ara RTL model.

RISC-V Vector extension implements → 100% 2e evidence

Ara is the first fully open-source processor compliant with RVV 1.0 specification.

CVA6 uses → 100% 2e evidence

Ara is seamlessly integrated with the open-source CVA6 RISC-V core.

spike uses → 85% 2e evidence

Prior verification efforts for Ara used co-simulation with Spike.

CVA6 depends on → 100% 2e evidence

Ara is integrated with and depends on the CVA6 core for scalar instruction processing.

Universal Verification Methodology uses → 85% 2e evidence

Prior verification efforts for Ara employed UVM along with RISCV-DV and co-simulation with Spike.

riscv-dv uses → 85% 2e evidence

Prior verification efforts for Ara used RISCV-DV.

Verilator uses → 100% 1e evidence

Ara can be simulated using Verilator, which is used in this work.

SIMD implements → 85% 1e evidence

Ara implements vector/SIMD processing with dynamic vector lengths.