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Feedback-Based Verification

Technique WIKI v1 · 5/28/2026

Feedback-Based Verification is an automated test-application technique that uses coverage feedback to adjust how long verification test sequences run. In the cited RISC-V superscalar processor verification work, it uses each sequence’s incremental contribution to functional coverage to assign more simulation cycles to productive sequences and replace or suppress unproductive ones, with reported simulation-time savings of about 70% when applied to a Register Renaming Sub-system.

Overview

Feedback-Based Verification is a test-application technique for functional verification in which the verification environment observes the online quality of applied test sequences and uses that feedback to decide future simulation duration. In the cited UVM-based verification work on a 2-way superscalar out-of-order RISC-V processor, the technique is introduced as one of two automation methods whose shared goal is to increase functional coverage while decreasing test-application time. [C1]

The method is intended for situations where a verification team already has a set of direct or parameterized constrained-random sequences and a set of functional coverage goals, but the quality of those sequences is uncertain. The broader problem is how to apply the available sequences over multiple trials so that coverage quality is maximized. [C2]

Mechanism

The feedback-based mechanism dynamically adjusts the test-application time assigned to each available test sequence. It observes the quality of each applied sequence online; sequences that contribute more are assigned more cycles in future trials, while poorly performing sequences are replaced so that simulation effort is redirected to tests that improve coverage. [C1]

More specifically, the technique uses each sequence’s incremental contribution to functional coverage as the feedback signal for deciding how long that sequence should execute in the next simulation round. This creates a loop that identifies sequence durations that lead to faster coverage growth. [C3]

Unlike the Multi-Armed Bandit approach described in the same thesis, the feedback-based method does not change the order in which different test sequences are applied; it optimizes their durations. The reported experimental results indicate that adjusting duration alone can still reduce simulation time substantially. [C3]

Relationship to functional coverage

Functional coverage is the main optimization target of Feedback-Based Verification. The technique uses coverage improvement as the measure of sequence quality, and its purpose is to reach higher functional coverage levels with less test-application time. [C1] [C3]

In the source work, functional coverage is treated as important evidence of verification quality and project status during front-end verification. Complete coverage statistics, from block-level to top-level where applicable, are described as proof of verification quality and development progress. [C1]

Application to Register Renaming

The technique was validated on the UVM-based verification of the Register Renaming Sub-system (RRS) of a 2-way superscalar out-of-order RISC-V processor. The available tests included constrained-random sequences with different parameters and direct-test sequences, and the feedback-based technique orchestrated their application by selecting sequence durations for the RRS module under test. [C4]

The reported results showed that the feedback-based method achieved much higher functional coverage in substantially smaller simulation time than a conventional approach that runs each test sequence for the same predetermined number of cycles. The reported simulation-time savings were approximately 70% for different sets of test sequences. [C4]

Practical role

Feedback-Based Verification automates part of the verification cycle that would otherwise require manual judgment about how long to run each test sequence. By shifting simulation cycles toward sequences with demonstrated coverage value and away from ineffective sequences, it reduces wasted regression time while preserving the goal of coverage closure. [C1] [C3]

LINKED ENTITIES

2 links
Functional Coverage USES
Register Renaming EVALUATES

CITATIONS

5 sources
5 citations
[1] Feedback-Based Verification is presented as an automated test-application technique that aims to increase functional coverage and decrease test-application time by observing sequence quality online, assigning more cycles to higher-quality sequences, and replacing poor sequences. [PDF] UVM-based verification of RISC-V superscalar processors
[2] The motivating test-application problem is how to apply a set of direct or parameterized constrained-random sequences with uncertain quality against functional coverage goals over multiple trials. [PDF] UVM-based verification of RISC-V superscalar processors
[3] The feedback-based technique uses each sequence's incremental contribution to functional coverage to decide future execution duration, does not change sequence order, and can improve simulation time by optimizing duration alone. [PDF] UVM-based verification of RISC-V superscalar processors
[4] The technique was validated on the UVM-based verification of the Register Renaming Sub-system using constrained-random sequences with different parameters and direct-test sequences. [PDF] UVM-based verification of RISC-V superscalar processors
[5] Compared with conventional simulation that gives each sequence the same predetermined number of cycles, the feedback-based method achieved higher functional coverage in substantially smaller simulation time, with about 70% simulation-time savings reported for different test-sequence sets. [PDF] UVM-based verification of RISC-V superscalar processors