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DPI Interface

Technique

The DPI Interface is a hardware-verification interface layer used to connect SystemVerilog/UVM testbenches with system-level or C/C++ components. The provided evidence describes DPI as necessary for some SystemVerilog interactions with emulation platforms and native C/C++ code, but also notes that data exchange through DPI can introduce runtime overhead and affect testbench performance.

First seen 5/25/2026
Last seen 5/25/2026
Evidence 3 chunks
Wiki v1

WIKI

Overview

The DPI Interface is described in the provided evidence as an interface layer used in SystemVerilog-based verification flows to reach system-level functionality and C/C++ components. In the cited DVCon paper, a SystemVerilog testbench is characterized as being able to interface to the system level only through the DPI layer, and SystemVerilog/UVM environments are described as needing DPI when interfacing with C/C++ for emulation-platform interaction. [DPI role in SystemVerilog verification]

Use in verification architectures

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RELATIONSHIPS

2 connections
SystemVerilog ← uses 95% 2e
SystemVerilog testbenches interface with system-level via the DPI layer.
eUVM ← uses 90% 1e
eUVM integrates with RTL simulators via PLI/VHPI/FLI or DPI interface.

CITATIONS

6 sources