custom tracer for execution log capture

Custom Tracer for Execution Log Capture

Technique

A verification technique that integrates a custom tracer directly into a RISC-V core (specifically the Hornet RV32IMF core) to capture execution logs during simulation. The captured logs are then automatically compared against a reference instruction set simulator (Spike) via structured CSV-based scripts, enabling the detection of subtle compliance and arithmetic errors.

First seen 6/8/2026

Last seen 6/8/2026

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Overview

A custom tracer for execution log capture is a verification technique in which a purpose-built tracing module is integrated into a processor core to record its runtime behavior during simulation. The captured execution logs are then post-processed and compared against a golden reference (such as the Spike ISS) to detect functional, architectural, and arithmetic compliance bugs that directed or constrained-random tests may miss.

In the context of the ISMSIT 2025 verification framework, the custom tracer is embedded inside the Hornet RV32IMF core. As the core executes test programs, the tracer produces structured execution log data that is automatically compared with Spike's reference output through CSV-based comparison scripts.

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Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools ← uses 100% 1e

The paper integrates a custom tracer into the Hornet core to capture execution logs.

Hornet RV32IMF core ← uses 95% 1e

The custom tracer is integrated into the Hornet RV32IMF core to capture execution logs.

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Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools USES Extracted graph relationship

Hornet RV32IMF core USES Extracted graph relationship

CITATIONS

5 sources

5 citations — click to expand

[1] A custom tracer integrated into the Hornet RV32IMF core captures execution logs. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools (ISMSIT 2025)

[2] Captured execution logs are automatically compared with Spike through structured CSV-based scripts. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools (ISMSIT 2025)

[3] The approach detects subtle errors often missed by directed tests, including incorrect IEEE-754 rounding-mode handling and precision loss in division and square root. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools (ISMSIT 2025)

[4] The framework successfully uncovered and resolved multiple floating-point bugs in the Hornet core and demonstrated compatibility with both open-source (Python flow, Spike ISS) and commercial (Xcelium) tools. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools (ISMSIT 2025)

[5] The technique ensures compliance with RISC-V and IEEE-754 standards, providing a scalable, flexible foundation for verifying cores with advanced arithmetic capabilities. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools (ISMSIT 2025)