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STIMSMITH

LLM4DV

Paper
First seen 7/5/2026
Last seen 7/5/2026
Evidence 8 chunks

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RELATIONSHIPS

25 connections
Coverage-Feedback Prompting Template introduces → 97% 2e
The paper introduces a Coverage-Feedback prompt template for interactively eliciting test stimuli from LLMs.
Coverpoint Type-based Sampling introduces → 95% 2e
The paper introduces Coverpoint Type-based Sampling as a specific missed-bin sampling method.
Constrained Random Testing compares with → 98% 2e
The paper compares LLM4DV to traditional constrained-random testing.
Mixed Coverpoint Type-based and Pure Random Sampling introduces → 95% 2e
The paper introduces Mixed Coverpoint Type-based and Pure Random Sampling as a sampling method.
Primitive Data Prefetcher Core introduces → 97% 1e
The paper designs and constructs the Primitive Data Prefetcher Core as one of three DUT modules.
Ibex Instruction Decoder introduces → 97% 1e
The paper designs and constructs the Ibex Instruction Decoder as one of three DUT modules.
Ibex CPU introduces → 97% 1e
The paper designs and constructs the Ibex CPU as one of three DUT modules.
Zixi Zhang authored by → 99% 1e
Zixi Zhang is listed as an author of the LLM4DV paper.
Greg Chadwick authored by → 99% 1e
Greg Chadwick is listed as an author of the LLM4DV paper.
Hugo McNally authored by → 99% 1e
Hugo McNally is listed as an author of the LLM4DV paper.
Yiren Zhao authored by → 99% 1e
Yiren Zhao is listed as an author of the LLM4DV paper.
Robert Mullins authored by → 99% 1e
Robert Mullins is listed as an author of the LLM4DV paper.
design verification uses → 98% 1e
The paper targets the domain of hardware design verification.
Functional Coverage uses → 97% 1e
The paper uses functional coverage as the metric for DV success.
Coverage Plan uses → 97% 1e
The paper uses the concept of a coverage plan to drive test stimuli generation.
Coverage Bin uses → 97% 1e
The paper uses coverage bins as fundamental units of coverage tracking.
Design Under Test uses → 97% 1e
The paper uses the concept of design-under-test to describe the hardware modules being verified.
Assertion-Based Verification mentions → 93% 1e
The paper mentions assertion-based verification as a related technique in hardware design verification.
Concolic Testing mentions → 93% 1e
The paper mentions concolic testing as a prior approach to test generation in hardware verification.
GPT-3.5-turbo-0613 compares with → 90% 1e
The paper compares GPT-3.5-turbo-0613 and Llama 2 7B on the Ibex Instruction Decoder module.
LLM4DV Framework introduces → 99% 1e
The paper LLM4DV presents and introduces the LLM4DV benchmarking framework.
Llama 2 7B compares with → 90% 1e
The paper compares Llama 2 7B and GPT-3.5-turbo-0613 on the Ibex Instruction Decoder module.
Missed-Bin Sampling introduces → 97% 1e
The paper proposes missed-bin sampling as one of four prompting improvements.
Best-Iterative-Message Sampling introduces → 97% 1e
The paper proposes best-iterative-message sampling as one of four prompting improvements.
Dialogue Restarting introduces → 97% 1e
The paper proposes dialogue restarting as one of four prompting improvements.