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STIMSMITH

Ibex CPU

CodeArtifact
First seen 7/5/2026
Last seen 7/5/2026
Evidence 3 chunks

NEIGHBORHOOD

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RELATIONSHIPS

4 connections
LLM4DV ← introduces 97% 1e
The paper designs and constructs the Ibex CPU as one of three DUT modules.
LLM4DV Framework ← evaluates 98% 1e
The LLM4DV framework is evaluated on the Ibex CPU DUT module.
RISC-V implements → 98% 1e
The Ibex CPU is a full RISC-V CPU with instruction and data memory.
Ibex Instruction Decoder ← part of 85% 1e
The Ibex CPU is a full CPU that includes an instruction decoder component.