table mutator

Concept

A table mutator is a Logic Fuzzer mechanism for processor verification that replaces or wraps RTL memory-like tables so their contents can be fuzzed, pre-populated, invalidated, or otherwise mutated during simulation. In the cited MICRO-54 work, table mutators are used on structures such as branch-predictor tables, cache tag/data arrays, valid bits, TLB entries, and other memory elements to stress under-exercised microarchitectural states without regenerating test binaries.

First seen 5/27/2026

Last seen 5/27/2026

Evidence 4 chunks

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WIKI

Overview

A table mutator is a Logic Fuzzer mechanism that allows RTL memories or table-like microarchitectural structures to be mutated during verification. The cited work describes table mutators as a way to fuzz structures such as branch-predictor tables, cache entries, TLB entries, and invalid entries, while preserving architectural correctness assumptions for structures whose contents should not affect the correctness of the running program.

What it mutates

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RELATIONSHIPS

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Logic Fuzzer ← uses 100% 2e

Logic Fuzzer implements table mutators as one of its fuzzing mechanisms.

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Logic Fuzzer USES Extracted graph relationship

CITATIONS

6 sources

6 citations — click to expand

[1] Table mutators allow RTL memories to be mutated and can fuzz branch-predictor tables, invalidate cache or TLB entries, and fuzz values of already-invalid entries. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...

[2] A table mutator can be implemented by replacing RTL memory access with access to a fuzzer-managed table through DPI, with contents fuzzed randomly or using specific patterns. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...

[3] In the CVA6 cache example, tag arrays and valid bits were mutated to steer cache accesses to a bank of interest; the authors report replacing tag arrays with DPI wrappers and implementing a small Table Mutator method. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...

[4] The CVA6 L1 cache experiment used more than 50 random tests generated with Google's riscv-dv and observed way/bank utilization differences with and without tag-array mutation. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...

[5] To insert random instructions into a mispredicted path, the authors replaced instruction-cache tag and data arrays with table mutators, forced branch-prediction structures, and programmed fuzzer tables to provide a random instruction stream for a specific tag. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...

[6] Logic Fuzzer's Table Mutators can partially address the loss of microarchitectural state in checkpoint-based co-simulation by pre-populating or randomizing tables such as caches, TLBs, and other memory elements. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...