Definition
PMP stands for Physical Memory Protection. In RISC-V, PMP and ePMP—Enhanced PMP—are features that restrict access to memory regions in order to enforce privilege, isolation, and security policies.
Role in RISC-V verification
PMP is identified as one of the RISC-V features that may not be fully exercised by random stimulus alone. The evidence specifically lists memory protection alongside privilege-mode transitions and page-table walks as areas where random generation can leave verification gaps.
Because of this, PMP verification is typically discussed as part of a hybrid verification approach: constrained-random stimulus is used for broad exploration, while directed suites are used to close feature-specific coverage gaps.
Verification approaches
Constrained-random testing
STING is described as a RISC-V bare-metal functional verification tool that generates constrained-random and directed tests. Its generated programs are portable across simulation, emulation, FPGA prototypes, and silicon, and are architecturally self-checking. The evidence states that STING is particularly effective at stressing privilege levels, memory protection, CSRs, and hypervisor extensions.
Directed suites
ImperasTS includes directed suites for virtual memory and protection features, including TS-MMU / PMP / ePMP. These suites are intended to target areas where random stimulus often leaves gaps, and they are configured to match the user’s RISC-V processor.
Coverage and closure context
Coverage closure for RISC-V designs can involve combining constrained-random sweeps with functional coverage analysis and directed test suites. The cited flow uses random stimulus to discover unexpected behavior and directed suites such as ImperasTS to systematically address gaps revealed in coverage analysis. PMP is specifically listed among the critical privilege specifications supported by the verification flow, alongside MMU, hypervisor, and vector extensions.