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get_directed_instr_stream

CodeArtifact WIKI v1 · 5/26/2026

get_directed_instr_stream() is a function in the riscv_asm_program_gen assembly-program generation flow of riscv-dv. In the documented gen_program() sequence, it is called before program-header generation and is associated with selecting directed-instruction generation ratios through add_directed_instr_stream().

Overview

get_directed_instr_stream() is documented as part of the gen_program() execution flow in riscv_asm_program_gen.sv, the SystemVerilog UVM-based assembly program generator used by the CHIPS Alliance riscv-dv random instruction generator for RISC-V processor verification. The surrounding riscv_asm_program_gen class generates the complete RISC-V assembly program, including initialization, instruction, data, stack, page-table, interrupt, and exception-handling sections.

Role in program generation

Within gen_program(), get_directed_instr_stream() is called early in the generation sequence. The source describes gen_program() as the main function that generates all sections of the program and calls other riscv_asm_program_gen functions one by one. After gen_program() is invoked from an upper layer, it calls get_directed_instr_stream() and uses add_directed_instr_stream() to select the ratio of directed instruction generation.

The article gives an example log message for adding a directed instruction stream:

riscv_asm_program_gen.sv(1552) @ 0: reporter [asm_gen] Adding directed instruction stream:riscv_jal_instr ratio: 30/1000

This indicates that directed streams can be added with explicit generation ratios, such as a riscv_jal_instr stream at 30/1000.

Position in the surrounding flow

The documented generation flow around get_directed_instr_stream() is:

  1. gen_program() is called as the main assembly-program generation entry point.
  2. get_directed_instr_stream() is called.
  3. Directed-instruction generation ratios are selected via add_directed_instr_stream().
  4. gen_program_header() is called to populate the instruction stream with header content.
  5. init_gpr() initializes general-purpose registers with random values.
  6. generate_directed_instr_stream() later decides ratios, inserts directed instruction streams, and randomizes instructions, including register selection for rs1, rs2, and rd according to instruction type.

Relationship to directed instruction generation

The evidence distinguishes get_directed_instr_stream() from generate_directed_instr_stream(). get_directed_instr_stream() appears in the setup phase where directed streams and their ratios are selected, while generate_directed_instr_stream() is later described as deciding the ratio, inserting the directed instruction stream, and randomizing instructions. The latter also selects source and destination registers based on instruction type and contributes to assembly using GPRs x0 through x31.

Verification context

The function exists in the broader riscv-dv context, where random assembly tests are generated for RISC-V IP verification. The generator configuration is randomized through riscv_instr_gen_config from riscv_instr_base_test.sv, determining features such as supported RISC-V extensions, privilege mode, instruction counts, and whether to generate instructions such as ebreak, dret, fence, or wfi.

LINKED ENTITIES

3 links
gen_program called_by
add_directed_instr_stream uses_for_ratio_selection
generate_directed_instr_stream related_directed_generation_step

CITATIONS

7 sources
7 citations
[1] riscv-dv is an open-source CHIPS Alliance random instruction generator for RISC-V processor verification. RISC-V source class riscv_asm_program_gen, the brain behind ...
[2] riscv_asm_program_gen.sv generates complete RISC-V assembly programs and covers sections such as initialization, instruction, data, stack, page table, interrupt, and exception handling. RISC-V source class riscv_asm_program_gen, the brain behind ...
[3] gen_program() is the main function for generating all sections of the assembly program. RISC-V source class riscv_asm_program_gen, the brain behind ...
[4] gen_program() calls get_directed_instr_stream(), and directed-instruction generation ratios are selected using add_directed_instr_stream(). RISC-V source class riscv_asm_program_gen, the brain behind ...
[5] An example directed stream log adds riscv_jal_instr with a ratio of 30/1000. RISC-V source class riscv_asm_program_gen, the brain behind ...
[6] generate_directed_instr_stream() later decides ratios, inserts directed instruction streams, randomizes instructions, and selects rs1, rs2, and rd according to instruction type. RISC-V source class riscv_asm_program_gen, the brain behind ...
[7] riscv_instr_gen_config is randomized from riscv_instr_base_test.sv and controls configuration such as RISC-V extension, privilege mode, instruction counts, and no_ebreak/no_dret/no_fence/no_wfi options. RISC-V source class riscv_asm_program_gen, the brain behind ...