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STIMSMITH

BlackParrot

CodeArtifact

BlackParrot is a RISC-V processor core used as one of three evaluation targets in the MICRO-54 paper "Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation." In that evaluation, Dromajo and Dromajo enhanced with Logic Fuzzer exposed multiple BlackParrot-specific bugs, including integer division sign-extension handling, illegal-instruction decoding, JALR target-address handling, speculative long-latency instruction commit behavior, and Logic Fuzzer-triggered issues around backend/frontend backpressure and irregular memory-region access.

First seen 5/27/2026
Last seen 5/28/2026
Evidence 6 chunks
Wiki v2

WIKI

Overview

BlackParrot is identified in the MICRO-54 paper Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation as one of three RISC-V cores evaluated, alongside CVA6 and BOOM. The paper's evaluation used Dromajo-based co-simulation and then re-ran the same binary set with Logic Fuzzer enabled to expose additional bugs. [Core evaluation target; Main results]

For BlackParrot, the simulated test set summarized in the paper included 215 RISC-V ISA tests and 150 random instruction-stream tests generated with riscv-dv. [BlackParrot test binaries]

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RELATIONSHIPS

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The paper evaluates Logic Fuzzer and Dromajo on the BlackParrot RISC-V core.
Dromajo ← evaluates 100% 4e
Dromajo was integrated and evaluated with the BlackParrot core.
Logic Fuzzer ← evaluates 100% 1e
Logic Fuzzer was applied to BlackParrot to find additional bugs.