Skip to content
STIMSMITH

sailcov

Tool

sailcov is a coverage-measurement tool used in a RISC-V architectural coverage study. In the cited study, it measured how many branches of the RISC-V Sail model were explored during test runs, enabling comparison of QCVEngine, riscv-tests, and RISCV-DV across RISC-V configurations.

First seen 5/27/2026
Last seen 6/3/2026
Evidence 2 chunks
Wiki v1

WIKI

Overview

sailcov is a tool used to evaluate architectural coverage for RISC-V testing. In the referenced coverage study, the authors state that they evaluated RISC-V architectural coverage using sailcov, which measured how many branches of the RISC-V Sail model were explored during a run.[1]

Role in RISC-V coverage evaluation

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

6 connections
Architectural Coverage evaluates → 100% 6e
sailcov is used to measure architectural coverage of RISC-V model branches.
TestRIG ← uses 95% 4e
TestRIG uses sailcov to measure architectural coverage of the Sail RISC-V model.
QCVEngine ← uses 90% 4e
QCVEngine's coverage is measured using sailcov on the Sail RISC-V model.
Sail RISC-V Model ← uses 90% 1e
sailcov measures coverage of the Sail RISC-V model execution.
Randomized Testing of RISC-V CPUs using Direct Instruction Injection ← uses 100% 1e
The paper uses sailcov to measure architectural coverage achieved by TestRIG.
Sail RISC-V Formal Model evaluates → 100% 1e
sailcov measures coverage of the Sail RISC-V model branches during testing.

LINKED ENTITIES

2 links
Architectural Coverage EVALUATES Extracted graph relationship
Sail RISC-V Model USES Extracted graph relationship

CITATIONS

8 sources
8 citations — click to expand
[1] sailcov purpose and metric Randomized Testing of RISC-V CPUs using Direct
[2] framework comparison Randomized Testing of RISC-V CPUs using Direct
[3] RV32IMC measured coverage Randomized Testing of RISC-V CPUs using Direct
[4] RV64IMAFDCZicsr measured coverage Randomized Testing of RISC-V CPUs using Direct
[5] riscv-tests measurement method Randomized Testing of RISC-V CPUs using Direct
[6] RISCV-DV measurement method Randomized Testing of RISC-V CPUs using Direct
[7] QCVEngine coverage-study configuration Randomized Testing of RISC-V CPUs using Direct
[8] sailcov source location Randomized Testing of RISC-V CPUs using Direct