riscv-tests

Tool

riscv-tests is the Assembly-language GitHub repository `riscv-software-src/riscv-tests`. It provides the RISC-V ISA test suite used by multiple RISC-V projects as a regression baseline, including Swimmer-RISCV (which uses it for its regression run) and multi-core UVM verification environments built on Spike (which use it as the initial set of regression jobs and complement it with random tests generated by riscv-dv). It is also used in published comparisons of RISC-V testing frameworks, most notably the TestRIG paper, where it is evaluated by running its binaries through the Sail RISC-V model for RV32IMC and RV64IMAFDCZicsr coverage and compared with QCVEngine/TestRIG and RISCV-DV.

First seen 5/29/2026

Last seen 7/10/2026

Evidence 7 chunks

Wiki v2

WIKI

Overview

riscv-tests is an Assembly-language GitHub repository under riscv-software-src/riscv-tests. The public repository metadata reports 1,219 stars, 553 forks, and a last update timestamp of 2026-07-10T10:13:49Z.[1]

Use as a regression baseline

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NEIGHBORHOOD

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RELATIONSHIPS

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TestRIG compares with → 90% 2e

TestRIG is compared with riscv-tests for coverage and counterexample complexity.

Randomized Testing of RISC-V CPUs using Direct Instruction Injection ← compares with 90% 2e

The paper compares TestRIG with riscv-tests for coverage and counterexample complexity.

QCVEngine ← compares with 90% 2e

QCVEngine is compared against riscv-tests for coverage and counterexample complexity.

Verification of a RISC-V system with multiple cores ← uses 100% 2e

riscv-tests is used as a source of directed tests.

Swimmer-RISCV ← evaluates 90% 2e

Swimmer-RISCV is tested using the riscv-tests repository for regression testing.

regression test implements → 95% 1e

The riscv-tests repository is used to run regression tests against Swimmer-RISCV.

LINKED ENTITIES

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regression test IMPLEMENTS Extracted graph relationship

Swimmer-RISCV EVALUATES Extracted graph relationship

CITATIONS

5 sources

5 citations — click to expand

[1] riscv-tests is the Assembly-language GitHub repository riscv-software-src/riscv-tests with 1,219 stars, 553 forks, and last updated 2026-07-10T10:13:49Z. riscv-software-src/riscv-tests

[2] Swimmer-RISCV uses the riscv-tests repository to run its regression tests, with 10 of 402 patterns failing (rv32mi-p-mcsr, rv32uc-v-rvc, rv32mi-p-illegal, rv32mi-p-breakpoint, rv32mi-p-ma_fetch, rv64uc-v-rvc, rv64mi-p-breakpoint, rv64mi-p-access, rv64mi-p-illegal, rv64mi-p-ma_fetch). msyksphinz-self/swimmer_riscv

[3] The RISC-V Summit Europe 2025 abstract describes a multi-core UVM verification flow whose initial regression jobs used riscv-tests, with the bulk of tests later provided by riscv-dv. Verification of a RISC-V system with multiple cores

[4] The TestRIG paper uses riscv-tests as a comparison baseline alongside QCVEngine/TestRIG and RISCV-DV, measuring coverage by running riscv-tests binaries on the Sail RISC-V model for RV32IMC (I, M, C plus GPRs) and RV64IMAFDCZicsr (I, M, A, F, D, C, CSRs, GPRs, FPRs). Randomized Testing of RISC-V CPUs using Direct Instruction Injection (TestRIG)

[5] TestRIG reports a median counterexample size of 561 instructions for riscv-tests traces (no shrinking), compared to 3 for QCVEngine and 15,339 for RISCV-DV, and reports similar RV32IMC coverage across the three frameworks with more variance for RV64IMAFDCZicsr. Randomized Testing of RISC-V CPUs using Direct Instruction Injection (TestRIG)