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unordered floating-point reduction reference model

Technique WIKI v1 · 5/27/2026

The unordered floating-point reduction reference model is a C reference model used in RISC-V vector accelerator verification to avoid false mismatches against Spike for unordered floating-point reductions. It implements the same reduction algorithm as the design under test and, on a matching result, injects that value back into Spike to prevent later execution divergence.

Overview

The unordered floating-point reduction reference model is an independent C reference model used during functional verification of a RISC-V vector accelerator. It was introduced for unordered floating-point reduction instructions whose behavior could produce mismatches against Spike even when the vector processing unit result was considered correct under the relevant rounding mode and reduction algorithm. [Citation: purpose-and-context]

Problem addressed

The verification environment normally used Spike to provide reference results for vector instructions. However, unordered floating-point reductions created two specific issues:

  1. A mismatch could be reported even when the device-under-test result was correct according to the rounding mode and algorithm used.
  2. Even after identifying such a mismatch as a false positive, the differing value remained in Spike's vector registers and could later be consumed by subsequent instructions, causing further mismatches. [Citation: false-positive-and-divergence-problem]

Technique

To handle these cases, the verification flow created an independent C reference model for unordered reductions. The model implements the same exact reduction algorithm as the design under test. For unordered floating-point reductions, the vector accelerator result is compared against this reduction reference model rather than against Spike. If the result matches the reduction reference model, the matching value is injected into Spike's register state. [Citation: c-model-and-comparison-flow]

Role in the verification flow

The technique complements a Spike-based reference flow. Spike is used to resume simulation until a vector instruction is executed, provide instruction data and reference information to the UVM environment, and support memory reads. For unordered floating-point reductions specifically, an added function forces the reduction result into Spike to avoid execution divergence after a reduction result has been accepted by the independent model. [Citation: spike-integration]

Relationship to Spike

This technique does not replace Spike as the general reference model. Instead, it compares against Spike's behavior for a narrow class of unordered floating-point reductions and overrides Spike's state when the independent reduction model confirms the design-under-test result. [Citation: spike-comparison-scope]

CITATIONS

5 sources
5 citations
[1] purpose-and-context: The technique was introduced in a RISC-V vector accelerator verification setting to avoid false mismatches for unordered floating-point reductions. source
[2] false-positive-and-divergence-problem: Unordered floating-point reductions could cause mismatches even when correct under the rounding mode and algorithm, and Spike's retained differing register value could later cause additional mismatches. source
[3] c-model-and-comparison-flow: The verification flow created an independent C reference model for unordered reductions, implemented the same reduction algorithm as the DUT, compared VPU results against it instead of Spike, and injected the value into Spike when the model matched. source
[4] spike-integration: The verification environment used Spike to resume simulation to vector instructions, return reference results to UVM, read Spike memory, and force reduction results into Spike to avoid divergence. source
[5] spike-comparison-scope: The technique is used as an alternative comparison source for unordered reductions rather than as a wholesale replacement for Spike. source