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CSV-based log comparison scripts

Technique WIKI v1 · 6/8/2026

A verification technique that captures execution logs from a core's custom tracer into a structured CSV format and automatically compares them against reference outputs from the Spike ISS, enabling systematic detection of subtle functional bugs such as IEEE-754 rounding mode and precision errors.

Overview

CSV-based log comparison scripts are a verification technique used in RISC-V processor verification flows. The approach captures execution traces from a design under test (DUT) using a custom tracer and stores them in a structured CSV format, which is then automatically compared against reference execution logs produced by the Spike ISS.

How It Works

In the context of the Hornet RV32IMF core verification flow, a custom tracer is integrated directly into the core to record execution information. The captured traces are formatted as CSV, providing a structured, machine-readable representation of the core's runtime behavior. These CSV logs are then compared through dedicated scripts against the corresponding execution logs generated by Spike, the open-source RISC-V instruction set simulator, which serves as the golden reference model.

Role in the Verification Environment

The technique forms the comparison backbone of a reusable verification framework that combines:

  • RISCV-DV for random instruction generation
  • Spike ISS as the open-source reference (via the Python flow)
  • Xcelium as a commercial simulator option
  • A custom tracer inside the Hornet RV32IMF core for execution logging

By structuring comparisons around CSV files, the scripts enable automated regression checking across large randomly generated test suites without manual inspection.

Detected Bug Classes

The structured CSV-based comparison is credited with systematically exposing subtle errors that are typically missed by directed testing, including:

  • Incorrect handling of IEEE-754 rounding modes
  • Precision loss in arithmetic units such as division and square root

Multiple floating-point bugs in the Hornet core were uncovered and resolved using this approach.

Significance

Because the comparison is structured and script-driven, the technique scales with the volume of random tests generated by RISCV-DV, helping ensure compliance with both the RISC-V ISA specification and the IEEE-754 floating-point standard across open-source (Python/Spike) and closed-source (Xcelium) simulation flows.

LINKED ENTITIES

2 links
Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools USES
Spike (ISS) USES

CITATIONS

4 sources
4 citations
[1] A custom tracer integrated into the Hornet RV32IMF core captures execution logs which are automatically compared with Spike through structured CSV-based scripts. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools
[2] The CSV-based comparison approach systematically detects subtle errors often missed by directed tests, including incorrect handling of IEEE-754 rounding modes and precision loss in arithmetic units such as division and square root. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools
[3] The framework successfully uncovered and resolved multiple floating-point bugs in the Hornet core while demonstrating compatibility with both open and closed-source flows. Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools
[4] The reusable framework combines RISCV-DV for random instruction generation with both open-source (Python flow, Spike ISS) and commercial tools (Xcelium). Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools