Flavien Solt

Person

Available sources document Flavien Solt as an author of the 2024 USENIX Security paper "Cascade: CPU Fuzzing via Intricate Program Generation." The cited paper lists Katharina Ceesay-Seitz and Kaveh Razavi as coauthors, and the paper PDF lists ETH Zurich as the affiliation.

First seen 6/14/2026

Last seen 7/26/2026

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Flavien Solt

Based on the available evidence, Flavien Solt is documented as an author of the 2024 paper Cascade: CPU Fuzzing via Intricate Program Generation.

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RELATIONSHIPS

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Cascade: CPU fuzzing via intricate program generation ← authored by 100% 4e

Flavien Solt is listed as an author of the paper

Encarsia: Evaluating CPU Fuzzers via Automatic Bug Injection ← authored by 100% 2e

Flavien Solt is listed as an author of the paper.

HARTBREAKER paper ← authored by 100% 1e

Flavien Solt is listed as an author of the HARTBREAKER paper.

UC Berkeley part of → 100% 1e

Flavien Solt is affiliated with UC Berkeley.

RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation ← authored by 100% 1e

The paper is authored by Flavien Solt.

μCFI: Formal Verification of Microarchitectural Control-flow Integrity ← authored by 100% 1e

Flavien Solt is listed as an author of the paper.

ETH Zurich part of → 100% 1e

Flavien Solt is affiliated with ETH Zurich.

RemembERR database ← authored by 90% 1e

The RemembERR database was created by the paper authors including Flavien Solt.

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Cascade: CPU fuzzing via intricate program generation AUTHORED_BY Extracted graph relationship

CITATIONS

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[1] Flavien Solt is listed as an author of the paper "Cascade: CPU Fuzzing via Intricate Program Generation." Cascade: CPU Fuzzing via Intricate Program Generation - USENIX

[2] The paper's coauthors are Katharina Ceesay-Seitz and Kaveh Razavi. Cascade: CPU Fuzzing via Intricate Program Generation - BibBase

[3] The paper was published at the 33rd USENIX Security Symposium (USENIX Security 24) in August 2024, and USENIX lists it on pages 5341-5358. Cascade: CPU Fuzzing via Intricate Program Generation - USENIX

[4] The paper PDF lists Flavien Solt's affiliation as ETH Zurich. [PDF] Cascade: CPU Fuzzing via Intricate Program Generation

[5] The paper presents Cascade as a CPU fuzzer for RISC-V that generates valid programs of arbitrary length with highly randomized and interdependent control and data flows. [PDF] Cascade: CPU Fuzzing via Intricate Program Generation

[6] The paper states that Cascade uses asymmetric ISA pre-simulation to entangle control flows with data flows and detect bugs through program non-termination without runtime overhead. [PDF] Cascade: CPU Fuzzing via Intricate Program Generation

[7] The evaluation reports 28.2x to 97x more coverage than prior state-of-the-art CPU fuzzers and 37 new bugs, including 28 new CVEs, across five RISC-V CPUs. [PDF] Cascade: CPU Fuzzing via Intricate Program Generation

[8] The paper describes an automated pruning method to reduce bug-triggering programs to a minimal number of instructions. [PDF] Cascade: CPU Fuzzing via Intricate Program Generation