Generating Instruction Streams Using Abstract CSP

Paper

“Generating Instruction Streams Using Abstract CSP” is a DATE 2012 paper by Y. Katz, M. Rimon, and A. Ziv. In later processor-verification literature, it is described as an optimized test-generation framework that propagates constraints among multiple instructions effectively.

First seen 5/26/2026

Last seen 5/26/2026

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WIKI

Overview

“Generating Instruction Streams Using Abstract CSP” is a paper by Y. Katz, M. Rimon, and A. Ziv, published in DATE in 2012, on pages 15–20. It is cited in later work on processor-verification test generation as a contribution to instruction-stream generation.

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Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study ← mentions 95% 1e

The paper cites this work as an optimized test generation framework using abstract CSP.

LINKED ENTITIES

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Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study cited_by The evidence is from this paper and includes “Generating instruction streams using abstract CSP” as reference [3].

CITATIONS

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[1] bibliographic_metadata Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study

[2] technical_characterization_as_optimized_test_generation_framework Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study

[3] constraint_propagation_across_multiple_instructions Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study

[4] context_within_model_based_instruction_stream_generation_for_processor_verification Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study

[5] later_risc_v_cross_level_testing_paper_cites_and_contrasts_prior_instruction_stream_generation_work Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study