μARCHIFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections

Paper

First seen 7/6/2026

Last seen 7/6/2026

Evidence 7 chunks

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RELATIONSHIPS

21 connections

VerFI mentions → 90% 2e

The paper discusses VerFI as related simulation-based work.

Faulty Transition System introduces → 100% 2e

The paper introduces the faulty transition system formalism.

FIVER mentions → 95% 2e

The paper discusses FIVER as related work for fault injection analysis.

Damien Couroussé authored by → 100% 1e

Damien Couroussé is listed as an author of the paper.

Karine Heydemann authored by → 100% 1e

Karine Heydemann is listed as an author of the paper.

Mathieu Jan authored by → 100% 1e

Mathieu Jan is listed as an author of the paper.

CEA List authored by → 95% 1e

The paper is affiliated with CEA List.

Thales DIS authored by → 95% 1e

One author (Karine Heydemann) is affiliated with Thales DIS.

SYNFI mentions → 95% 1e

The paper discusses SYNFI as related work for equivalence checking of netlists.

Lazart mentions → 90% 1e

The paper mentions Lazart as related work for software-level fault robustness analysis.

ARMORY mentions → 90% 1e

The paper mentions ARMORY as related work for fault simulation on ARM binaries.

SimpliFI mentions → 90% 1e

The paper mentions SimpliFI as related work for hardware simulation of fault attacks.

SAMVA mentions → 85% 1e

The paper mentions SAMVA as related work for multi-fault attack path analysis.

Cadence JasperGold mentions → 90% 1e

The paper mentions Cadence JasperGold as a commercial tool supporting fault injection.

Synopsys VC Formal mentions → 90% 1e

The paper mentions Synopsys VC Formal as a commercial tool supporting SystemVerilog Assertions.

Siemens QuestaVerify mentions → 90% 1e

The paper mentions Siemens QuestaVerify as a commercial tool supporting SystemVerilog Assertions.

nuXmv mentions → 80% 1e

The paper references nuXmv as a symbolic model checker.

μARCHIFI introduces → 100% 1e

The paper introduces μARCHIFI as a new open-source tool for formal modeling and verification of microarchitectural fault injections.

SW/HW Co-verification introduces → 90% 1e

The paper introduces a complete workflow for SW/HW co-verification against fault injection.

Simon Tollec authored by → 100% 1e

Simon Tollec is listed as an author of the paper.

Mihail Asavoae authored by → 100% 1e

Mihail Asavoae is listed as an author of the paper.