A RISC-V CHERI VP: Enabling System-Level Evaluation of the Capability-Based CHERI Architecture
PaperFirst seen 6/21/2026
Last seen 6/21/2026
Evidence 5 chunks
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12 connectionsThe paper uses TestRIG for verification of CHERI-RISC-V VP++.
The paper introduces the CHERI-RISC-V VP++ as its main contribution.
The paper evaluates CheriBSD running on the CHERI-RISC-V VP++.
The paper is published by the Institute for Complex Systems.
The paper targets enabling security analysis as a use case of the VP.
The paper targets enabling design space exploration as a use case of the VP.
The paper targets enabling early software development as a use case of the VP.
The paper mentions plans to adapt RVVTS for CHERI-RISC-V VP++.
The paper is authored by Manfred Schlägl.
The paper uses virtual prototyping as the core methodology.
The paper is authored by Andreas Hinterdorfer.
The paper is authored by Daniel Große.