A Comparison of Three Verification Techniques: Directed Testing, Pseudo-Random Testing and Property Checking
PaperFirst seen 7/18/2026
Last seen 7/18/2026
Evidence 7 chunks
NEIGHBORHOOD
No graph connections found for this entity yet. It may appear in future ingestion runs.
explore full graph →RELATIONSHIPS
17 connectionsThe paper describes verification of the LFI-IBC32 design.
The paper describes verification of the LFI-S design.
The paper discusses bug curves as a way to measure design maturity.
The paper describes using GateProp for property checking.
The paper discusses productisation of verification IP for reuse.
The paper describes using Specman Elite for pseudo-random testing.
The paper compares and evaluates pseudo-random testing as one of three verification techniques.
The paper compares and evaluates property checking as one of three verification techniques.
The paper describes verification of the LFI bus bridge.
The paper mentions plans to develop bus protocol packages for AHB.
Mike G. Bartley is listed as an author of the paper.
The paper mentions semi-formal tools as a future direction for combining dynamic and static verification.
Darren Galpin is listed as an author of the paper.
Tim Blackmore is listed as an author of the paper.
Mike G. Bartley was affiliated with Elixent Ltd at the time of paper publication.
Darren Galpin and Tim Blackmore were affiliated with Infineon Technologies UK Ltd.
The paper compares and evaluates directed testing as one of three verification techniques.