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IEEE

Organization

The Institute of Electrical and Electronics Engineers (IEEE) is a publisher of peer-reviewed research and conference proceedings spanning computing, semiconductor design, and electronic systems. IEEE venues and journals serve as a primary dissemination outlet for verification methodologies for microprocessors and ASICs, including work cited in adjacent technical literature on SystemVerilog testbench generation and functional verification.

First seen 6/15/2026
Last seen 8/16/2026
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IEEE

Overview

The Institute of Electrical and Electronics Engineers (IEEE) is a professional organization and publisher whose conference proceedings, transactions, and magazines document foundational and applied research across electrical engineering, computer engineering, and semiconductor design. The organization hosts flagship venues such as the International Workshop on Microprocessor and SOC Test and Verification (MTV) and publishes journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, and IEEE Design and Test of Computers [chunk: c5866c2e-7b30-431b-a284-066e19dd343f][chunk: cb6c4274-0846-4ce5-a889-a60865744405].

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NEIGHBORHOOD

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RELATIONSHIPS

9 connections
AI based SystemVerilog TB generation ← published by 50% 1e
The paper was published in the Journal of Scientific and Engineering Research and references IEEE publications, but the paper itself appears in JSAER.
Microprocessor Verification via Feedback-Adjusted Markov Models ← published by 100% 1e
The paper was published in an IEEE Transactions journal.
Automation of Processor Verification Using Recurrent Neural Networks ← published by 100% 1e
The paper was published at an IEEE workshop.
Coverage directed test generation for functional verification using Bayesian networks ← published by 100% 1e
The paper was published at the Design Automation Conference by IEEE.
Automatic Generation of Validation Stimuli for Application-Specific Processors ← published by 100% 1e
The paper was published at the DATE conference by IEEE Computer Society.
Design and Verification of SystemC Transaction-Level Models ← published by 100% 1e
The paper was published in an IEEE Transactions journal.
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage ← published by 100% 1e
The paper was published at an IEEE/ACM conference.
Automation and Optimization of Coverage-driven Verification ← published by 100% 1e
The paper was published at an IEEE conference.
IEEE Xplore Full-Text PDF ← published by 95% 1e
The paper is published by IEEE on the IEEE Xplore platform.

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IEEE Xplore Full-Text PDF PUBLISHED_BY Extracted graph relationship

CITATIONS

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4 citations — click to collapse
[1] IEEE publishes journals and conference proceedings spanning semiconductor design and verification, including IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on VLSI Systems, and IEEE Design and Test of Computers. AI based SystemVerilog TB generation
[2] IEEE-sponsored venues such as MTV and Euromicro DSD (in IEEE proceedings) document microprocessor and SOC verification research including coverage-driven verification and stimulus generation. AI based SystemVerilog TB generation
[3] IEEE operates IEEE Xplore, which hosts full-text PDFs of conference and journal papers including verification-related contributions. IEEE Xplore Full-Text PDF
[4] An IBM Research-authored paper on micro-architecture verification for microprocessors was published in IEEE Design and Test of Computers. Micro-architecture verification for microprocessors