Barcelona Supercomputing Center

Organization

Barcelona Supercomputing Center (BSC) is identified in the evidence as the affiliation for the validation team behind a RISC-V vector-accelerator verification paper and as a participant in the European Processor Initiative, where BSC developed a Vector Accelerator connected to a scalar RISC-V core.

First seen 5/27/2026

Last seen 5/28/2026

Evidence 2 chunks

Wiki v1

WIKI

Overview

Barcelona Supercomputing Center (BSC) appears in the supplied evidence as the institutional affiliation for work on the functional verification of a RISC-V vector accelerator. The paper Functional Verification of a RISC-V Vector Accelerator lists a “Validation Team” in the “Computer Sciences Department” at Barcelona Supercomputing Center, includes multiple author email affiliations at bsc.es, and notes that the work was done while the authors were affiliated with Barcelona Supercomputing Center. [citation: BSC affiliation in verification paper]

Role in the European Processor Initiative

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NEIGHBORHOOD

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RELATIONSHIPS

3 connections

Functional Verification of a RISC-V Vector Accelerator ← authored by 95% 3e

The paper was produced by the verification team at Barcelona Supercomputing Center.

Vector Processing Unit (VPU) introduces → 97% 2e

BSC developed the vector accelerator (VPU) as part of the EPI project.

European Processor Initiative part of → 90% 1e

BSC is a partner in the European Processor Initiative developing the vector accelerator.

LINKED ENTITIES

2 links

Functional Verification of a RISC-V Vector Accelerator AUTHORED_BY Extracted graph relationship

European Processor Initiative PART_OF Extracted graph relationship

CITATIONS

7 sources

7 citations — click to expand

[1] BSC affiliation in verification paper Functional Verification of a RISC-V Vector Accelerator

[2] BSC role in EPI vector accelerator Functional Verification of a RISC-V Vector Accelerator

[3] Verification infrastructure and EPI tape-out Functional Verification of a RISC-V Vector Accelerator

[4] Verification results and contributions Functional Verification of a RISC-V Vector Accelerator

[5] VPU architecture Functional Verification of a RISC-V Vector Accelerator

[6] VPU operation support Functional Verification of a RISC-V Vector Accelerator

[7] VPU interface and scalar-core interaction Functional Verification of a RISC-V Vector Accelerator