FLEQ.S

ISA

FLEQ.S is a single-precision floating-point comparison instruction from the RISC-V Zfa extension that compares two values for less-than-or-equal-to relation, behaving like FLE.S but treating quiet NaN inputs as not signaling the invalid operation exception.

First seen 9/27/2026

Last seen 9/27/2026

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FLEQ.S

FLEQ.S is a single-precision floating-point comparison instruction defined as part of the RISC-V Zfa extension. It compares two single-precision floating-point register values, writing a boolean result that indicates whether the first operand is less than or equal to the second.

Semantics

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NEIGHBORHOOD

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RELATIONSHIPS

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Zfa part of → 90% 1e

Zfa adds the FLEQ.S instruction.

sail-riscv ← implements 93% 1e

sail-riscv supports FLEQ.S.

FLE derived from → 92% 1e

FLEQ is defined like FLE but quiet NaNs do not raise invalid operation.

LINKED ENTITIES

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Zfa PART_OF Extracted graph relationship

sail-riscv IMPLEMENTS Extracted graph relationship

FLE DERIVED_FROM Extracted graph relationship

CITATIONS

3 sources

3 citations — click to collapse

[1] FLEQ.S is a single-precision floating-point comparison instruction added as part of the RISC-V Zfa extension. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · riscv/sail-riscv

[2] FLEQ is defined like FLE except that quiet NaN inputs do not cause the invalid operation exception flag to be set. Add Zfa extension support (excl. quad-precision) · riscv/sail-riscv commit f2d8e1b9

[3] FLEQ.S was implemented in sail-riscv alongside the broader Zfa support in commit f2d8e1b9, which also introduced the Zfa existence macro. Add Zfa extension support (excl. quad-precision) · riscv/sail-riscv commit f2d8e1b9