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FLEQ.H

ISA WIKI v1 · 9/27/2026

FLEQ.H is a half-precision floating-point quiet comparison instruction defined as part of the RISC-V Zfa extension. It is implemented in the sail-riscv formal model and behaves like FLE.H except that quiet NaN inputs do not raise the invalid operation exception flag.

Overview

FLEQ.H is a half-precision floating-point instruction introduced by the Zfa extension for RISC-V. It compares two half-precision floating-point values and writes a boolean result to an integer register, indicating whether the first operand is less than or equal to the second.

Semantics

FLEQ.H is defined analogously to the existing FLE.H instruction, with one key difference:

  • Quiet NaN handling: FLEQ.H does not set the invalid operation exception flag (NV) when either or both operands are quiet NaNs. Instead, such inputs simply yield the standard comparison result for unordered operands (false).

This mirrors the quiet-comparison behavior already established by FEQ (which also suppresses the NV flag for quiet NaNs).

Origin and Extension

FLEQ.H is one of three FLEQ variants introduced together by the Zfa extension, alongside:

  • FLEQ.S — single-precision form
  • FLEQ.D — double-precision form

Zfa also introduces the corresponding quieter-than variants:

  • FLTQ.H / FLTQ.S / FLTQ.D — quiet floating-point less-than comparisons

These are bundled in Zfa with other instructions such as FLI.[HSD], FMINM.[HSD], FMAXM.[HSD], FROUND.[HSD], FROUNDNX.[HSD], FMVH.X.D, FMVP.D.X, and FCVTMOD.W.D.

Implementation

FLEQ.H is implemented in the sail-riscv formal specification, where Zfa support (excluding quad-precision) was added in commit f2d8e1b9 on top of commit 9b477812019a78510ebc7f4c7b7efbf378e64a42. The implementation supplies the supporting infrastructure (including an existence macro for Zfa) alongside concrete semantics for FLEQ.[HSD] and the companion FLTQ.[HSD] instructions.

Related Instructions and Extensions

  • FLE / FLE.H — the signaling counterpart; FLEQ.H differs only in NV-flag behavior on quiet NaNs.
  • FLT / FLT.H — has a matching quieter variant FLTQ.H introduced by Zfa.
  • Zfa — the parent extension that defines FLEQ.H.
  • FLE — the base instruction from which FLEQ.H is derived.

LINKED ENTITIES

3 links
Zfa PART_OF
sail-riscv IMPLEMENTS
FLE DERIVED_FROM

CITATIONS

3 sources
3 citations
[1] FLEQ.H is part of the RISC-V Zfa extension. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv
[2] FLEQ.H is defined like FLE.H except that quiet NaN inputs do not cause the invalid operation exception flag to be set. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv
[3] FLEQ.[HSD] and FLTQ.[HSD] are added together as part of Zfa support in sail-riscv commit f2d8e1b9. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv