FLEQ.H
ISAFLEQ.H is a half-precision floating-point quiet comparison instruction defined as part of the RISC-V Zfa extension. It is implemented in the sail-riscv formal model and behaves like FLE.H except that quiet NaN inputs do not raise the invalid operation exception flag.
First seen 9/27/2026
Last seen 9/27/2026
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Overview
FLEQ.H is a half-precision floating-point instruction introduced by the Zfa extension for RISC-V. It compares two half-precision floating-point values and writes a boolean result to an integer register, indicating whether the first operand is less than or equal to the second.
Semantics
NEIGHBORHOOD
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3 connectionsZfa adds the FLEQ.H instruction.
sail-riscv supports FLEQ.H.
FLEQ is defined like FLE but quiet NaNs do not raise invalid operation.
CITATIONS
3 sources3 citations — click to collapse
[1] FLEQ.H is part of the RISC-V Zfa extension. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv
[2] FLEQ.H is defined like FLE.H except that quiet NaN inputs do not cause the invalid operation exception flag to be set. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv
[3] FLEQ.[HSD] and FLTQ.[HSD] are added together as part of Zfa support in sail-riscv commit f2d8e1b9. Commits · 9b477812019a78510ebc7f4c7b7efbf378e64a42 · github.com/riscv/sail-riscv