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STIMSMITH

virtual memory

Concept

In the provided evidence, virtual memory is described in the context of the VAMP processor and its formal testing models. VAMP implements virtual-memory infrastructure alongside caching, while the assembler-level model abstracts address translation so that computations occur in a linear virtual memory space.

First seen 5/25/2026
Last seen 6/8/2026
Evidence 5 chunks
Wiki v1

WIKI

Overview

In the VAMP processor case study, virtual memory appears as part of the processor-level memory infrastructure and as an implementation detail that is abstracted away in higher-level testing models.

Role in VAMP

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NEIGHBORHOOD

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RELATIONSHIPS

3 connections
UCAM-CL-TR-984 ← uses 90% 1e
Virtual memory is discussed as part of the sweeping revocation optimisation strategy.
sweeping revocation ← uses 90% 1e
Virtual memory is used in the sweeping revocation optimisation.
Toooba ← uses 85% 1e
Toooba as an application-class processor uses virtual memory via an MMU.

CITATIONS

5 sources
5 citations — click to expand
[1] VAMP implements virtual memory infrastructure Test Program Generation for a Microprocessor: A Case Study
[2] VAMP memory interface uses Memory Management Units, caches, physical memory, and a bus protocol Test Program Generation for a Microprocessor: A Case Study
[3] The assembler model hides address translation and uses a linear virtual memory space Test Program Generation for a Microprocessor: A Case Study
[4] The assembler configuration models memory as a mapping from natural numbers to integers Test Program Generation for a Microprocessor: A Case Study
[5] Virtual memory and caching are treated as complex details made transparent by the abstract assembler model for black-box test generation Test Program Generation for a Microprocessor: A Case Study