Overview

In the VAMP processor case study, virtual memory appears as part of the processor-level memory infrastructure and as an implementation detail that is abstracted away in higher-level testing models.

Role in VAMP

The VAMP processor includes a memory model in its ISA configuration, and the VAMP system implements both caching and virtual memory infrastructures. Its memory interface is described as consisting of two Memory Management Units that access instruction and data caches, which then access physical memory through a bus protocol.

Abstraction in the assembler model

The Isabelle/HOL assembler model used for test specifications abstracts the lower-level ISA representation. In this abstraction, address translation is not visible, and assembler computations are described as living in a linear virtual memory space. The assembler configuration represents memory as a mapping from natural numbers to integers.

Relevance to testing

The test-generation case study treats virtual memory, caching, interrupt handling, pipelining, and instruction reordering as complex processor details that are made transparent by the more abstract assembler model. In the black-box testing scenario, the abstract model is used to generate tests whose goal is to check conformance to the assembler-level behavior independently of internal implementation details.