Overview

Vienna Architecture Description Language (VADL) is an architecture description language shown in OpenVADL material as a way to describe an instruction set architecture and its instructions. A VADL example for RV64I defines a register file X, an instruction format Itype, the ADDI instruction semantics, and the instruction encoding for ADDI.

instruction set architecture RV64I = {
  register X : Bits<5> -> Bits<64>
  format Itype : Bits<32> =
  { imm    : Bits<12>
  , rs1    : Bits<5>
  , rd     : Bits<5>
  , opcode : Bits<7>
  , ...
  , immS = imm as SInt<32>
  }
  instruction ADDI : Itype = X(rd) := X(rs1) + immS
  encoding ADDI = {opcode = 0b001'0011, funct3 = 0b000}
}