Overview

generate_directed_instr_stream() is part of the RISC-V assembly program generation flow described for the riscv_asm_program_gen class in the open-source CHIPS Alliance riscv-dv random instruction generator. The broader generator produces complete RISC-V assembly programs used for RISC-V IP verification, including initialization routines, instruction sections, data sections, stack sections, page tables, and interrupt/exception handling sections.

Role in the generation flow

Within gen_program(), the assembly generator performs several steps before and around directed instruction generation:

1. gen_program() is the main function that generates all sections of the program.
2. It calls get_directed_instr_stream() and uses add_directed_instr_stream() to select directed-instruction generation ratios.
3. It calls gen_program_header(), which fills an instr_stream string array with header content and calls gen_section("_start", str) to insert header instructions.
4. It calls init_gpr(), which initializes general-purpose registers with random values.
5. It then calls generate_directed_instr_stream().

Function behavior

According to the available evidence, generate_directed_instr_stream() performs three main tasks:

• decides the ratio for directed instruction stream insertion;
• inserts directed instruction streams into the generated program flow;
• randomizes instructions, including selecting rs1, rs2, and rd operands according to instruction type.

This behavior contributes to producing an assembly program that exercises instructions using different RISC-V general-purpose registers, from x0 through x31. The evidence also states that the post_random() function of riscv_instr helps with this GPR variation.

Interaction with instruction stream conversion

After directed instruction stream generation, the riscv_instr_sequence flow uses generate_instr_stream, which has the instruction stream available and uses convert2asm() to convert generated instructions into assembly text. The riscv_asm_program_gen class also calls main_program[hart].generate_instr_stream() to convert the instruction stream into string format.

Constraints and related checks

The generation flow includes checks for illegal and HINT instruction ratios. If those ratios are zero, no illegal or HINT instructions are generated. This check is described as part of the surrounding instruction generation process after directed instruction stream generation.