Skip to content
STIMSMITH

CVA5 RISC-V Core

CodeArtifact
First seen 7/12/2026
Last seen 7/12/2026
Evidence 6 chunks

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

6 connections
TaPaFuzz ← uses 100% 2e
TaPaFuzz uses the CVA5 RISC-V core as the processor inside the fuzzer PE.
branch predictor uses → 100% 2e
CVA5 has a branch predictor that must be cleared between fuzzer runs.
The paper evaluates the CVA5 RISC-V core modified for fuzzing purposes.
RISC-V ISA implements → 100% 1e
CVA5 is a RISC-V soft-core processor implementing the RISC-V ISA.
Soft-Core Processor implements → 100% 1e
CVA5 is an FPGA-based soft-core RISC-V processor.
Scratchpad Memory uses → 100% 1e
CVA5 uses optional BRAM scratchpad interfaces for low-latency memory access.