ZeBu

Tool

ZeBu is referenced as an emulation platform in a RISC-V verification flow where tests are intended to remain portable across simulation, emulation, FPGA prototyping, and silicon.

First seen 5/25/2026

Last seen 5/26/2026

Evidence 3 chunks

Wiki v1

WIKI

Overview

ZeBu is identified in the provided evidence as an emulation target within a RISC-V processor verification methodology. The cited flow emphasizes test portability across multiple execution environments, including simulation, emulation (ZeBu®), FPGA prototyping, and silicon. [C1]

Role in RISC-V verification flows

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NEIGHBORHOOD

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RELATIONSHIPS

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STING uses → 95% 2e

STING-generated portable tests are executed on ZeBu emulation platform.

LINKED ENTITIES

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Synopsys DEVELOPED_BY Extracted graph relationship

CITATIONS

2 sources

2 citations — click to collapse

[1] ZeBu is referenced as an emulation target in a portable RISC-V verification flow spanning simulation, emulation, FPGA prototyping, and silicon. source

[2] The described methodology treats test portability across these platforms as enabling a shift-left approach in which tests from RTL bring-up remain useful in later validation stages and silicon. source