Overview
RISC-V Torture Test Generator is identified in the available evidence through the “RISC-V Torture” rows of the evaluation table in the paper “Verifying Instruction Set Simulators using Coverage-guided Fuzzing.” The table categorizes these rows under “Tests / Generator” and reports results for RISC-V Torture configurations of 1,000, 5,000, and 10,000 test cases.[C1]
The evidence does not describe the generator’s internal algorithm, input language, output format, repository, license, or supported RISC-V extensions. It supports only its use as an evaluated RISC-V test/generator baseline in the paper’s RISC-V instruction-set-simulator verification study.[C1][C2]
Evaluation context in the cited paper
The cited paper presents a case study on RISC-V ISS verification. The authors built a coverage-guided fuzzing approach on top of libFuzzer and used it to verify an RV32IMA instruction set simulator extracted from a publicly available RISC-V virtual prototype. The paper also used Spike and Forvis as reference instruction set simulators.[C2]
Within that study, RISC-V Torture appears as a comparison point against:
- RISC-V ISA Tests, listed as directed, hand-written tests that do not require a generation step.[C1]
- Coverage-guided fuzzing, the paper’s proposed fuzzing-based test-generation approach.[C1]
Reported RISC-V Torture results
The evaluation table reports generation-and-execution time, branch coverage, several functional-coverage metrics, and errors found in instruction set simulators. For the RISC-V Torture rows, the reported results are:[C1]
| Test / generator | Time | Branch coverage | R1 | R2 | R3 | V(RS1) | V(RS2) | V(RD) | V(I imm) | V(I shmt) | Errors found |
|---|---|---|---|---|---|---|---|---|---|---|---|
| RISC-V Torture 1000 | 5,280 s | 74.30% | 2.17% | 66.67% | 69.23% | 58.82% | 91.43% | 52.17% | 9.09% | 100.00% | ISS-UT: V1,V2; Spike: /; Forvis: H2 |
| RISC-V Torture 5000 | 26,108 s | 74.30% | 2.17% | 66.67% | 69.23% | 58.82% | 91.43% | 56.52% | 18.18% | 100.00% | ISS-UT: V1,V2; Spike: /; Forvis: H2 |
| RISC-V Torture 10000 | 52,168 s | 74.30% | 2.17% | 66.67% | 69.23% | 58.82% | 91.43% | 56.52% | 63.64% | 100.00% | ISS-UT: V1,V2; Spike: /; Forvis: H2 |
Comparison points from the same table
In the same evaluation, RISC-V ISA Tests completed in 2 seconds, reached 90.24% branch coverage, and found V1..V3 in ISS-UT. The coverage-guided fuzzing row completed in 32,492 seconds, reached 100.00% branch coverage and 100.00% on the R1, R2, and R3 functional-coverage columns, and found V1..V7 in ISS-UT, S1 in Spike, and H1,H2 in Forvis.[C1]
These numbers place RISC-V Torture in the paper as a substantial randomized or generated-test baseline, but the available evidence does not justify further claims about how the RISC-V Torture generator constructs tests or how it should be configured outside the reported experiment.[C1]