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STIMSMITH

OpenRISC1200 (OR1200)

Tool
First seen 8/13/2026
Last seen 8/13/2026
Evidence 6 chunks

NEIGHBORHOOD

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RELATIONSHIPS

7 connections
Verifying Open Source CPU Cores using Instruction Set Simulators in OVM Environments ← evaluates 100% 2e
The paper verifies the OR1200 core as a benchmark.
OR1200 Instruction Set ← part of 100% 2e
The OR1200 core implements the OR1200 instruction set.
Multiply-Accumulate (MAC) Unit ← part of 100% 1e
The OR1200 core includes a multiply-accumulate unit.
Load/Store Unit (LSU) ← part of 100% 1e
The OR1200 core includes a load/store unit as one of its execution units.
General Purpose Registers (GPRs) ← part of 100% 1e
The OR1200 core uses general purpose registers.
Arithmetic Logic Unit (ALU) ← part of 100% 1e
The OR1200 core includes an ALU as one of its execution units.
Harvard Memory Architecture implements → 100% 1e
The OR1200 core implements a Harvard memory architecture.