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STIMSMITH

MicroTitan

Tool
First seen 6/9/2026
Last seen 6/9/2026
Evidence 6 chunks

NEIGHBORHOOD

11 nodes · 14 edges
graph · MicroTitan · depth=1

RELATIONSHIPS

10 connections
rtlv ← evaluates 100% 2e
rtlv is applied to verify the MicroTitan SoC in a case study.
rtlv/shiva ← evaluates 100% 2e
rtlv/shiva is used to verify output determinism for the MicroTitan SoC.
OpenTitan derived from → 100% 2e
MicroTitan is based on a subset of the OpenTitan project.
clock domain ← part of 100% 2e
MicroTitan includes multiple clock domains that were verified separately.
The paper uses MicroTitan as a case study for output determinism verification.
SPI peripheral ← part of 100% 1e
MicroTitan includes an SPI peripheral.
USB peripheral ← part of 100% 1e
MicroTitan includes a USB peripheral.
RISC-V implements → 100% 1e
MicroTitan is a RISC-V SoC.
Ibex CPU ← part of 100% 1e
MicroTitan includes the Ibex CPU as a component.
UART peripheral ← part of 100% 1e
MicroTitan includes a UART peripheral.