KASIRGA-KIZIL

Overview

KASIRGA-KIZIL is the team name for a Turkish university chip-design effort that produced the KIZIL İşlemci (KIZIL Processor), a digital processor core entered in the TEKNOFEST 2023 Çip Tasarım Yarışması (Chip Design Competition), Sayısal İşlemci (Digital Processor) category. The design placed first in its category at the competition [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

The project is hosted publicly on GitHub under the repository KASIRGA-KIZIL/tekno-kizil, written primarily in Verilog, with 159 stars and 11 forks at the time of capture [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

Team

• Advisor (Danışman): Prof. Dr. Oğuz Ergin
• Team Captain (Takım Kaptanı): Seyyid Hikmet Çelik
• Team Members:
  • Emre Hakan Demirli
  • Mehmet Şakir Aslan
  • Ahmet Emre Oluk
  • Ege Deveci

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Architecture

The KIZIL processor is implemented around a pipeline (Boru Hattı) architecture. The repository documents the core's pipeline structure under the section "Çekirdek Yapısı - Boru Hattı" (Core Structure – Pipeline), with a dedicated block diagram illustrating the stage layout [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e]. The processor's feature table and overall system structure diagrams are also published in the repository's dokumanlar folder [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

Evaluation: CoreMark

Performance is evaluated against the CoreMark industry-standard embedded processor benchmark. The repository includes a CoreMark comparison chart ("CoreMark Karşılaştırma Grafiği") showing how KIZIL compares against reference processors [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

Physical Design Flow

The chip is brought from RTL to layout using the OpenLane automated RTL-to-GDSII flow, configured inside the repository at tekno-kizil/openlane/kizil_islemci. The checked-in OpenLane version is:

• OpenLane commit: dc8e6bb151df7ee2b93d7e9d6a15abf6f224db4d (HEAD, tag: 2023.03.12) [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e]

The OpenLane flow relies on the open_pdks process-design kit, specifically:

• open_pdks commit: e6f9c8876da77220403014b116761b0b2d79aab4 [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e]

Additional OpenLane run artifacts are mirrored as a Google Drive folder and an alternative SharePoint link published in the repository README [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

Competition Context

• Competition: TEKNOFEST 2023 Çip Tasarım Yarışması, Sayısal İşlemci Kategorisi
• Result: First place (Birincisi)
• Competition page: https://teknofest.org/tr/competitions/competition/121
• Specifications (TR): https://cdn.teknofest.org/media/upload/userFormUpload/Teknofest_%C3%87ip_%C5%9Eartnamesi_2023_v8_paylasilan_naLIQ.pdf
• Specifications (EN): https://cdn.teknofest.org/media/upload/userFormUpload/Teknofest_Chip_Specifications_2023_v5_paylasilan_kivby.pdf
• Presentation video (YouTube): https://www.youtube.com/watch?v=Kw16yyKHfTI

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Repository Resources

The dokumanlar/ directory of the repository contains, among other artifacts:

• teknofest_odul.png – Teknofest award image
• islemci_serimi.png – processor pinout diagram
• islemci_ozellikleri_tablo.png – processor feature table
• sistem_yapisi_dtr.png – system architecture diagram (Data path)
• cekirdek_yapisi_dtr.png – core / pipeline structure diagram
• coremark_karsilastirma.png – CoreMark comparison chart

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