KASIRGA-KIZIL

Tool

KASIRGA-KIZIL is a digital processor design project that won first place in the Teknofest 2023 Chip Design Competition's Digital Processor category. The project implements the KIZIL İşlemci (KIZIL Processor), a pipelined RISC-style core written in Verilog, benchmarked against CoreMark, and physically implemented using the OpenLane flow with the open_pdks Sky130 PDK.

First seen 6/14/2026

Last seen 6/14/2026

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KASIRGA-KIZIL

Overview

KASIRGA-KIZIL is the team name for a Turkish university chip-design effort that produced the KIZIL İşlemci (KIZIL Processor), a digital processor core entered in the TEKNOFEST 2023 Çip Tasarım Yarışması (Chip Design Competition), Sayısal İşlemci (Digital Processor) category. The design placed first in its category at the competition [chunk: 4d68b24d-2c91-4164-9d5b-d2c70e1be37e].

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NEIGHBORHOOD

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LINKED ENTITIES

11 links

KIZIL İşlemci IMPLEMENTS Extracted graph relationship

Oğuz Ergin AUTHORED_BY Extracted graph relationship

Seyyid Hikmet Çelik AUTHORED_BY Extracted graph relationship

Emre Hakan Demirli AUTHORED_BY Extracted graph relationship

Mehmet Şakir Aslan AUTHORED_BY Extracted graph relationship

Ahmet Emre Oluk AUTHORED_BY Extracted graph relationship

Ege Deveci AUTHORED_BY Extracted graph relationship

Coremark EVALUATES Extracted graph relationship

OpenLane USES Extracted graph relationship

open_pdks USES Extracted graph relationship

Pipeline (Boru Hattı) IMPLEMENTS Extracted graph relationship

CITATIONS

8 sources

8 citations — click to expand

[1] KASIRGA-KIZIL won first place in the Teknofest 2023 Chip Design Competition's Digital Processor (Sayısal İşlemci) category. KASIRGA-KIZIL/tekno-kizil

[2] The team's advisor is Prof. Dr. Oğuz Ergin and the team captain is Seyyid Hikmet Çelik, with members Emre Hakan Demirli, Mehmet Şakir Aslan, Ahmet Emre Oluk, and Ege Deveci. KASIRGA-KIZIL/tekno-kizil

[3] The KIZIL processor core is implemented with a pipeline (Boru Hattı) architecture, documented in the repository's 'Çekirdek Yapısı - Boru Hattı' section. KASIRGA-KIZIL/tekno-kizil

[4] The processor is benchmarked against CoreMark, with a CoreMark comparison chart included in the repository. KASIRGA-KIZIL/tekno-kizil

[5] The physical implementation flow uses OpenLane commit dc8e6bb151df7ee2b93d7e9d6a15abf6f224db4d (tag 2023.03.12) configured under tekno-kizil/openlane/kizil_islemci. KASIRGA-KIZIL/tekno-kizil

[6] The PDK used is open_pdks at commit e6f9c8876da77220403014b116761b0b2d79aab4. KASIRGA-KIZIL/tekno-kizil

[7] The repository is written primarily in Verilog and has 159 stars and 11 forks. KASIRGA-KIZIL/tekno-kizil

[8] Links to the Teknofest competition page, the Turkish and English competition specifications PDFs, and a YouTube presentation video are provided in the repository. KASIRGA-KIZIL/tekno-kizil