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Imperas OVPsim

Tool

Imperas OVPsim is an Imperas simulator/virtual-platform tool discussed in RISC-V processor-verification literature. Available evidence describes Imperas as supporting virtual platforms for multiple ISAs including RISC-V, claiming step-and-compare capability, and providing RISC-V core models under Apache 2.0 while tying them to a simulator licensed under the OVP Fixed Platform Kit.

First seen 5/28/2026
Last seen 5/28/2026
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WIKI

Overview

Imperas OVPsim is treated here as the Imperas simulator/virtual-platform tool associated with Imperas RISC-V processor models. A MICRO 2021 related-work discussion describes Imperas Software Ltd. as a commercial company that develops virtual platforms supporting a range of instruction set architectures, including RISC-V. The same source states that Imperas claims support for step-and-compare simulation capability.

Licensing and model availability

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NEIGHBORHOOD

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RELATIONSHIPS

2 connections
Imperas Software Ltd. ← uses 100% 1e
Imperas OVPsim is developed by Imperas Software Ltd as a commercial RISC-V verification solution.
Dromajo ← compares with 90% 1e
Dromajo is compared to Imperas OVPsim as an alternative co-simulation solution.

CITATIONS

4 sources
4 citations — click to collapse
[1] Imperas Software Ltd. develops virtual platforms supporting a range of ISAs, including RISC-V. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...
[2] Imperas claims support for step-and-compare simulation capability. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...
[3] Imperas provides RISC-V core models under Apache 2.0, while the model is attached to a simulator licensed under the OVP Fixed Platform Kit. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...
[4] Dromajo is contrasted with the Imperas solution by checkpoint support and by the whole Dromajo project being Apache 2.0 licensed. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co ...