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FPgen

Tool

FPgen, written as FP-Gen in the cited source, is a specialized test generator for floating-point verification that became part of IBM's Genesys PE hardware-verification tool ecosystem.

First seen 5/26/2026
Last seen 5/26/2026
Evidence 5 chunks
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WIKI

FPgen

FPgen is referred to as FP-Gen in the available source. It is described as a specialized test generator for floating-point verification. Its development is presented in the context of IBM's constraint-based random stimuli generation work for hardware verification, where user requests for tool capabilities to verify complex architectural mechanisms led to specialized generators. In the same passage, DeepTrans is identified as a specialized generator for address translation, while FP-Gen is identified as the specialized generator for floating-point verification. Both tools became part of Genesys PE.

Role in the verification tool ecosystem

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NEIGHBORHOOD

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RELATIONSHIPS

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Genesys-Pro ← uses 95% 1e
Genesys-Pro uses FPgen's testing knowledge for generating floating-point events
Genesys PE part of → 100% 1e
FP-Gen was developed for floating point verification and has become part of Genesys PE.
The paper introduces FP-Gen, a test generation framework for floating-point verification.

CITATIONS

5 sources
5 citations — click to expand
[1] FP-Gen is a specialized test generator for floating-point verification. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[2] FP-Gen was developed after Genesys PE generation options led users to request capabilities for verifying complex architectural mechanisms. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[3] FP-Gen and DeepTrans became part of Genesys PE. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[4] IBM random stimuli generation for hardware verification is described as a complex application relying on AI techniques, with ongoing exploration of CSP and knowledge-representation techniques. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[5] Aharoni et al. 2003 is listed as 'A test generation framework for datapath floating-point verification' in HLDVT-03, pages 17–22. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI