Condominium
ToolFirst seen 7/4/2026
Last seen 7/4/2026
Evidence 11 chunks
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21 connectionsCondominium was developed at the Bespoke Silicon Group
Condominium enables non-intrusive emulation via clock-gating to avoid perturbing DUT
Condominium employs a clock-gating mechanism to pause DUT emulation when backpressure is needed
Condominium gathers run-time instruction execution information and performs ISA cosimulation
Condominium gathers cycle-accurate instruction and stall source cycle attribution for performance profiling
Condominium facilitates precise emulation of peripherals and system calls
Condominium integrates specialized coverage engines for FPGA-accelerated high-fidelity coverage
Condominium is a Scale-Down approach for architectural prototyping of design subsystems
Condominium builds an FPGA cluster for heterogeneous prototyping
Condominium uses hardened AXI interfaces on Zynq for PS-PL communication
Condominium leverages DPI-C interfaces with simulated Verilog when using software RTL simulators
Condominium provides an overlay that includes the PL-Shell as the main interface
Condominium is used for verification and optimization of BlackParrot
CCE integrates into the Condominium infrastructure
Farzam Gilani is the primary author of Condominium
Condominium couples FPGA emulation speed with RTL simulation transparency
Anoop Mysore Nataraja designed the clock-gating mechanism for Condominium
Condominium builds upon the BaseJump STL library for generic AXI and UART bridges
Condominium uses the PYNQ API to program the overlay and DUT on the PL
Michael Taylor contributed to Condominium's physical design and assembly
Daniel Petrisko designed PS-PL interfaces and scale-down conceptualization for Condominium