Unified CPU input format with TileLink protocols
TechniqueA technique named in the DIFUZZRTL paper as one of several RTL-specific mechanisms developed for CPU fuzzing. The paper identifies it alongside cycle-sensitive register coverage guiding, asynchronous interrupt event handling, and drop-in-replacement designs within the DIFUZZRTL system.
First seen 6/28/2026
Last seen 6/28/2026
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Overview
Unified CPU input format with TileLink protocols is a technique described in the DIFUZZRTL paper as part of the implementation of DIFUZZRTL, an RTL fuzzer for automatically discovering unknown bugs in CPU RTL designs.
The paper lists this technique among several methods added to address unique RTL design characteristics. In the abstract, it appears alongside:
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3 connectionsThe paper introduces a unified CPU input format leveraging TileLink protocols.
DIFUZZRTL supports a unified CPU input format using TileLink protocols.
The unified input format technique relies on TileLink protocols.
CITATIONS
3 sources3 citations — click to collapse
[1] DIFUZZRTL is an RTL fuzzer proposed to automatically discover unknown bugs in CPU RTLs. DifuzzRTL: Differential Fuzz Testing to Find CPU Bugs
[2] The paper lists a unified CPU input format with TileLink protocols as one of several new techniques developed for unique RTL design characteristics, alongside cycle-sensitive register coverage guiding, asynchronous interrupt events handling, and drop-in-replacement designs. DifuzzRTL: Differential Fuzz Testing to Find CPU Bugs
[3] DIFUZZRTL was evaluated on OpenRISC Mor1kx Cappuccino, RISC-V Rocket Core, and RISC-V Boom Core. DifuzzRTL: Differential Fuzz Testing to Find CPU Bugs