Overview
Sequential Randomization is described in the evidence as a traditional method for randomizing instruction fields during automated microcode test generation. In this context, automated random test generators create microcode test sequences and attempt to distribute stimulus across meaningful opcode values and other instruction attributes. Sequential Randomization is characterized as randomizing instruction fields sequentially rather than using a more integrated constrained-random formulation. [Sequential Randomization characterization]
Reported limitations
The cited AMD/Synopsys article identifies three practical drawbacks of traditional sequential field randomization in microcode stimulus generation:
- it often results in verbose code;
- it often results in redundant code;
- it provides limited control over distributions. [Sequential Randomization limitations]
These limitations are discussed as motivation for using a hierarchical constrained-random approach with the Synopsys VCS constraint solver, intended to accelerate generation, reduce memory consumption, improve distribution control, and bias generation toward corner cases. [Alternative approach motivation]
Contrast with constrained-random approaches
The evidence describes SystemVerilog constraint-language constructs as providing a concise way to describe microcode instructions in terms of possible attribute combinations, with precise control over the distribution of values for individual fields. An initial single-class constrained-random generator, in which constraints for all opcodes were defined, is reported to have overcome the flaws attributed to sequential randomization methods. [SystemVerilog constraint contrast]
The same source later describes a hierarchical object-oriented approach: a base class captured global constraints common to all opcodes, while subclasses represented groups of related opcodes with similar constraints. Partitioning constraints hierarchically into smaller opcode groups is reported to have drastically reduced memory requirements and increased performance. [Hierarchical constrained-random contrast]
Usage context
The evidence places Sequential Randomization in the verification of increasingly complex microprocessor designs, where hand-written directed tests have declined and automated random test generators are used to cover stimulus space more efficiently. [Verification context]