Register renaming for temporaries is a technique used during code generation, optimization, or transpilation where different CPU registers are chosen to hold temporary values. As long as the data flow is maintained correctly, the resulting instruction sequence is functionally equivalent to the original.

For example, in the ARM architecture, the sequence:

mov r2, r0
add r2, r2, #1

is functionally equivalent to:

mov r3, r0
add r3, r3, #1

Here, the temporary value is stored in r2 in the original sequence but r3 in the alternative sequence. Both maintain the exact same data flow and logical result. This technique is a specific form of generating Equivalent instruction sequences.