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STIMSMITH

Model Checking for Test Generation

Technique
First seen 7/3/2026
Last seen 7/3/2026
Evidence 2 chunks

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RELATIONSHIPS

4 connections
FSM Coverage-Directed Test Generation ← uses 90% 2e
The FSM coverage-directed test generation uses model checking to generate test programs from selected paths.
Specification-based Compaction of Directed Tests for Functional Validation of Pipelined Processors ← uses 95% 2e
The paper uses model checking to generate test programs from selected FSM paths.
Temporal Logic Property uses → 95% 1e
Model checking for test generation uses temporal logic properties to specify desired behaviors.
Counterexample-based Test Generation uses → 95% 1e
Model checking exploits counterexamples as test programs.