Definition
Just-in-Time Compiled Simulation (JIT-CS) is one of the three main paradigms of instruction set simulation, alongside interpretive simulation and compiled simulation. These paradigms differ in flexibility and performance. JIT-CS is described as an attempt to combine the advantages of interpretive and compiled simulation by caching information about instructions after they have been decoded and reusing that cached information when the same instruction is executed again. [Definition and taxonomy; JIT-CS mechanism]
How it works
In interpretive simulation, instructions are decoded one by one at run time. This provides high flexibility for run-time modifiable programs, but instruction decoding is identified as the bottleneck. Compiled simulation performs decoding, and in some cases static scheduling, at compile time; however, it is not applicable to run-time modifiable code or dynamic scheduling. JIT-CS addresses this tradeoff by storing information on previously decoded instructions in a cache so that later executions of the same instruction can avoid repeated decoding. [Interpretive and compiled tradeoff; JIT-CS mechanism]
A related optimization appears in generated instruction set simulators: a decode macro decomposes an instruction word into bit fields, stores those fields in a record data type, and then caches the result of the decode function. This avoids repeated instruction decoding during simulation and is explicitly described as a technique similar to JIT-CS. [Decode-result caching]
Performance characteristics
The cited source states that JIT-CS can achieve simulation performance comparable to compiled simulation while retaining the flexibility of the interpretive approach. This performance benefit is attributed to reuse of cached information for instructions that are executed again. [JIT-CS performance rationale]
Experimental results in the same source compare interpretive simulation, JIT-CS, and a generated instruction set simulator. For a small processor design labeled P1, interpretive simulation achieved 0.22 MIPS, JIT-CS achieved 14.0 MIPS, and the generated simulator achieved 7.0 MIPS. For an industrial design labeled P2, JIT-CS achieved 2.5 MIPS and the generated simulator achieved 1.2 MIPS. The authors state that the generated simulator reached about 50% of the performance of a state-of-the-art JIT-CS simulation tool in the first experiment and that the generated ISS performance was comparable to modern custom-made instruction set simulators. [Experimental performance]
Role in instruction set simulation
JIT-CS is positioned as a practical middle ground in instruction set simulation. It mitigates the decoding bottleneck of interpretive simulators while avoiding the restrictions of fully compiled simulation for run-time modifiable code and dynamic scheduling. The technique is especially effective when software locality causes the same instructions to be executed repeatedly, such as in loops, because cached decode information can be reused. [Interpretive and compiled tradeoff; Locality and repeated decoding]
Limitations and comparison
The evidence does not present JIT-CS as universally fastest in all contexts, but it does show JIT-CS outperforming interpretive simulation in the reported P1 experiment. It also notes that custom JIT-CS simulators remained faster than the authors’ generated simulators, which the authors attributed to commercial tool optimizations and to the generated simulators reflecting hardware and pipeline effects that may not appear in high-level ISA descriptions. [Experimental performance; Reasons for JIT-CS advantage]