Interruption and Exception Simulation

Technique

Interruption and Exception Simulation is a CPU RTL fuzzing technique used in Instiller to exercise realistic CPU interruption and exception handling. The technique adds exception simulation, supports multiple simultaneous interruptions and exceptions, and accounts for their priorities to better cover CPU verification corner cases.

First seen 5/27/2026

Last seen 6/3/2026

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Overview

Interruption and Exception Simulation is a technique for CPU RTL fuzzing that simulates realistic CPU interruption and exception handling during test execution. In the Instiller work, interruptions and exceptions are treated as common CPU execution events whose simulation can help cover corner cases in CPU verification. [C1]

Motivation

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RELATIONSHIPS

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INSTILLER ← implements 99% 11e

Instiller implements realistic interruption and exception simulation in its fuzzing process.

INSTILLER ← uses 100% 5e

Instiller simulates realistic interruptions and exceptions to better cover CPU states.

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INSTILLER USES Extracted graph relationship

CITATIONS

8 sources

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[1] C1: Interruptions and exceptions are common in CPU execution, and simulating them in CPU testing can cover CPU verification corner cases. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[2] C2: Prior fuzzing work handled interruptions relatively simply and did not include exceptions, multiple interruptions and exceptions, or their priorities, limiting realistic CPU execution simulation and CPU-state coverage. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[3] C3: Instiller includes exceptions in CPU fuzzing, which the paper states was not proposed in the referenced prior work. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[4] C4: Instiller integrates more than one interruption and exception to simulate real-world CPU execution more comprehensively. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[5] C5: Instiller considers the priorities of different interruptions and exceptions to fuzz the CPU more thoroughly. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[6] C6: Including exceptions, multiple interruptions and exceptions, and their priorities is presented as better simulation of real-world interruption and exception handling than prior work. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[7] C7: Instiller enables its fuzzer to handle multiple interruptions and exceptions and considers their priorities as a stated contribution. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing

[8] C8: The Instiller evaluation reports a 29.4% coverage increase and 17.0% more mismatches found in the targets for the tool overall. [2401.15967] Instiller: Towards Efficient and Realistic RTL Fuzzing