Overview
Interpretive simulation is described in the context of instruction set simulators (ISS) as one of three main simulation paradigms, alongside compiled simulation and just-in-time compiled simulation (JIT-CS). These paradigms differ in flexibility and performance. [C1]
Operation
In an interpretive simulator, the instructions to be executed are decoded one by one. This execution style is the basis for the technique's flexibility, especially for programs that can be modified at run time. [C2]
Strengths
The cited source states that interpretive simulators offer the highest flexibility for run-time modifiable programs. This contrasts with compiled simulation, which performs decoding, and sometimes static scheduling, at compile time and is not applicable to run-time modifiable code or dynamic scheduling. [C3]
Limitation
The main bottleneck in interpretive simulation is instruction decoding. Because decoding is performed during simulation for each instruction, interpretive simulation can be slower than approaches that move decoding earlier or cache decoded information. [C4]
Comparison with other ISS paradigms
Compiled simulators carry out instruction decoding at compile time and may also perform static scheduling at compile time. However, the cited source states that compiled simulation is not applicable for run-time modifiable code and dynamic scheduling. [C5]
Just-in-time compiled simulation attempts to combine flexibility and performance by storing information on previously decoded instructions in a cache and reusing it when the instruction is executed again. The cited source states that this can achieve performance comparable to compiled simulation without losing the flexibility of the interpretive approach. [C6]
Reported performance example
In one evaluation on a small pipelined processor, a commercial-tool ISS using an interpretive approach achieved an average performance of 0.22 million instructions per second (MIPS), while a just-in-time compiled simulator achieved 14 MIPS. An ISS generated from a property suite achieved 7 MIPS in the same reported comparison. [C7]